FPGAs allow customization of SEU mitigation

FPGAs allow customization of SEU mitigation
by Don Dingee on 11-16-2016 at 4:00 pm

Teams working on avionics, space-based electronics, weapons delivery systems, nuclear generating plants, medical imaging equipment, and other applications where radiation leads to single-event upsets (SEU) are already sensitive to functional safety requirements. What about automotive applications?

With electronic… Read More


TMR approaches should vary by FPGA type

TMR approaches should vary by FPGA type
by Don Dingee on 06-20-2016 at 4:00 pm

We’ve introduced the concepts behind triple modular redundancy (TMR) before, using built-in capability in Synopsys Synplify Premier to synthesize TMR circuitry into FPGAs automatically. A recent white paper authored by Angela Sutton revisits the subject… Read More


3 flavors of TMR for FPGA protection

3 flavors of TMR for FPGA protection
by Don Dingee on 12-10-2015 at 4:00 pm

Back in the microprocessor stone age, government procurement agencies fell in love with the idea of radiation hardened parts that might survive catastrophic events. In those days, before rad-hard versions of PowerPC and SPARC arrived, there were few choices for processors in defense and space programs.

One of the first rad-hard… Read More