I have written before about an inter-chiplet communication challenge to realizing the dream of multi-die designs built around open-market chiplets. Still a worthy dream but it’s going to take a journey to get there. Arm recently donated their Foundation Chiplet System Architecture (FCSA) to the Open Compute Project (OCP) as… Read More
Tag: traffic management
400 GbE SmartNIC IP sets up FPGA-based traffic management
Sustaining wire-speed 400 GbE transfers is only a first step in managing enterprise traffic. Adding rules-based filtering to sift packets in real time can stress most networking hardware to a breaking point, slowing down an entire network. Architects are trying to spread these loads, distributing intelligent traffic management… Read More
Webinar: Achieving Very High Bandwidth Chip-to-Chip Communication with the Interlaken Interface Protocol
Open Silicon will hold this webinar on June 13th at 8 am PDT (or 5 pm CE) to describe their Interlaken IP core, and how to achieve very high bandwidth C2C communication in various networking applications. To be more specific, the Interlaken protocol can be used to support Packet Processing/NPU, Traffic Management, Switch Fabric,… Read More
