System VIPs are to PSS as Apps are to Formal

System VIPs are to PSS as Apps are to Formal
by Bernard Murphy on 06-24-2024 at 10:00 am

System VIP Libraries and Solutions

In the formal world the core technology is extremely powerful, and specialist users need full access to tackle difficult problems. But for many applications, teams prefer canned solutions built on the core technology yet scalable to non-experts. A similar dynamic appears to be playing out between System VIPs and PSS. PSS, the… Read More


Leveraging Virtual Platforms to Shift-Left Software Development and System Verification

Leveraging Virtual Platforms to Shift-Left Software Development and System Verification
by Kalar Rajendiran on 03-15-2022 at 6:00 am

Extend Accuracy with Hybrid Platforms

Ever since the cost of development started growing exponentially, engineering teams have been deploying a shift-left strategy to software development and system verification. While this has helped contain cost and accelerated product development schedules, a shift-left strategy is not without challenges. A virtual platform… Read More


Aldec Adds Simulation Acceleration for Microchip FPGAs

Aldec Adds Simulation Acceleration for Microchip FPGAs
by Tom Simon on 11-10-2020 at 10:00 am

Simulation Acceleration

Despite the fact that FPGA based systems make it easy to add ‘hardware in the loop’ for verification, the benefits of HDL and gate level simulation are critical for finding and eliminating issues and bugs. The problem is that software simulators can require enormous amounts of time to run full simulations over sufficient time intervals… Read More