The demand for high-performance computing (HPC), data centers, and AI-driven applications has fueled the rise of 2.5D and 3D multi-die designs, offering superior performance, power efficiency, and packaging density. However, these benefits come with myriads of challenges, such as multi-physics, which need to be addressed.… Read More
Tag: synopsys
Webinar: Efficient and Robust Memory Verification in Modern SoCs Using Formal Equivalence Checker
With the increasing complexity and importance of memories in modern ICs, there is a clear need for specialized tools and techniques for the design and verification of embedded memory blocks. Traditional methods like SPICE simulation and cell-based formal verification have limitations; SPICE offers circuit-level accuracy
Ansys-Synopsys Technology Update: The Latest Advances in Multi-Die Design
The semiconductor industry is rapidly adopting 2.5D and 3D multi-die designs as the significant benefits have become clear for applications like HPC, GPU, mobile, and AI/ML. Multi-die design technology has been quickly evolving with early experiences leading to the development of more advanced implementation and analysis… Read More
Optical Solutions User Conference
Learn, Network, and Accelerate Optical Design Innovation
For this year’s event, we are excited to be discussing the latest in optical design and simulation, including topics on image simulation with the entire image chain, freeform optics, display technnology, high-performance computing for photonic devices, and other
Optical Scattering Measurements and Instruments Info Day
Overview
Learn the latest on Synopsys’ optical scattering measurement solutions.
During the event, you will have the opportunity to network with Synopsys experts, listen to technical talks, and see several demonstrations of our scattering measurement equipment
Agenda
Morning
Topics include:
- General Overview of Synopsys
Synopsys’ 30th Annual Test & SLM Special Interest Group (SIG) & International Test Conference (ITC)
All members of the design and test community are invited to register to attend Synopsys’ 30th Annual Test & SLM Special Interest Group (SIG) at the 2024 International Test Conference (ITC).
The event will host experts from leading companies who will share how Synopsys Test and SLM solutions including AI-driven test, distributed… Read More
Webinar: Efficient and Robust Memory Verification in Modern SoCs Using Formal Equivalence Checker
With the increasing complexity and importance of memories in modern ICs, there is a clear need for specialized tools and techniques for the design and verification of embedded memory blocks. Traditional methods like SPICE simulation and cell-based formal verification have limitations; SPICE offers circuit-level accuracy
Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More
Memory Users Conference
Virtual Event
Oct 1st, 2024 | 8:00 AM PDT
Oct 2nd, 2024 | 8:00 AM GMT+8
Memory Users Conference
Advancements in memory technology are fueling rapid growth in big data applications across AI, 5G, Automotive, and HPC. These demanding applications create many challenges for memory designers. Some long-standing challenges are exacerbated,… Read More
The Immensity of Software Development and the Challenges of Debugging Series (Part 2 of 4)
Part 2 of this 4-part series reviews the role of virtual prototypes as stand-alone tools and their use in hybrid emulation for early software validation, a practice known as the “shift-left” methodology. It assesses the differences among these approaches, focusing on their pros and cons.