In the race to power ever-larger AI models, raw compute is only half the battle. The real challenge lies in moving massive datasets between processors, accelerators, and memory at speeds that keep up with trillion-parameter workloads. Synopsys tackles this head-on with its webinar, How PCIe Multistream Architecture is Enabling… Read More
Tag: synopsys
Webinar: How PCIe Multistream Architecture is enabling AI Connectivity at 64 GT/s and 128 GT/s
Featured Speakers:
- Diwakar Kumaraswamy, Sr. Staff Technical Product Manager, Synopsys
AI and HPC workloads push fabric speeds to deliver higher parallelism and utilization at extreme data rates. To support these higher rates, the controller architecture needs to be completely redefined resulting in the new PCIe controller
Synopsys and NVIDIA Forge AI Powered Future for Chip Design and Multiphysics Simulation
In a landmark announcement at NVIDIA’s GTC Washington, D.C. conference Synopsys unveiled deepened collaborations with NVIDIA to revolutionize semiconductor design and engineering through agentic AI, GPU-accelerated computing, and AI-driven physics simulations. This partnership, building on over three decades… Read More
Podcast EP315: The Journey to Multi-Die and Chiplet Design with Robert Kruger of Synopsys
Daniel is joined by Robert Kruger, product management director at Synopsys, where he oversees IP solutions for multi-die designs, including 2D, 3D, and 3.5D topologies. Throughout his career, Robert has held key roles in product marketing, business development, and roadmap planning at leading companies such as Intel, Broadcom,… Read More
Chiplets: Powering the Next Generation of AI Systems
AI’s rapid expansion is reshaping semiconductor design. The compute and I/O needs of modern AI workloads have outgrown what traditional SoC scaling can deliver. As monolithic dies approach reticle limits, yields drop and costs rise, while analog and I/O circuits gain little from moving to advanced process nodes. To sustain … Read More
Why Choose PCIe 5.0 for Power, Performance and Bandwidth at the Edge?
Synopsys recently held a webinar session on this topic and Gustavo Pimentel, Principal Product Marketing Manager at the company led the webinar session. Going into the webinar session, I found myself wondering: why focus on PCIe 5.0, eight years after its release? With the industry buzzing about Edge AI, cloud computing, and … Read More
Exploring TSMC’s OIP Ecosystem Benefits
Now that the dust has settled let’s talk more about TSMC’s Open Innovation Platform. Launched in 2008, OIP represents a groundbreaking collaborative model in the semiconductor industry. Unlike IDMs that controlled the entire supply chain, OIP fosters an “open horizontal” ecosystem uniting TSMC… Read More
Synopsys and TSMC Unite to Power the Future of AI and Multi-Die Innovation
In a rapidly evolving semiconductor landscape, where AI demands unprecedented computational power and efficiency, Synopsys has deepened its partnership with TSMC to pioneer advancements in AI-driven designs and multi-die systems. Announced during the TSMC OIP Ecosystem Summit last week, this collaboration leverages … Read More
AI Everywhere in the Chip Lifecycle: Synopsys at AI Infra Summit 2025
At the AI Infra Summit 2025, Synopsys showed how artificial intelligence has become inseparable from the process of creating advanced silicon. The company’s message was clear: AI is an end-to-end engine that drives every phase of chip development. Three Synopsys leaders illustrated this from distinct vantage points. Godwin… Read More
Webinar: ML-Enhanced TCAD Calibration With 10x Reduction in Time to Results
Date: Oct 15, 2025 | 5:00 PM PST
Featured Speakers:
- Saurabh Suryavanshi, Product Manager, Synopsys
- Youngkwon Cho, Senior Staff Engineer, Synopsys
- Dipanjan Basu, Principal Engineer, Synopsys
Calibration is an essential part of enabling TCAD products usages inside Semiconductor fab. Synopsys has been leading the development
