Modern ASIC, SoC, CPU, and GPU development depends on verification processes that detect subtle functional defects before tapeout. SystemVerilog Assertions (SVA) are particularly important because they encode temporal design intent: how signals, states, and transactions must behave across clock cycles. Unlike conventional… Read More
Tag: soc
Webinar: Shift Left to Ship Faster: Verifying IP and SoCs at Real Workload Speeds
Featured Speakers:
- Madhumita Sanyal, Sr. Director of Technical Product Management, Synopsys
- Varun Agrawal, Director of Product Management, Synopsys
As SoC complexity climbs, traditional verification can’t keep pace — and system-level bugs surface late, when they’re hardest to fix. By pairing Hardware-Assisted… Read More
Meet Quadric on the Road: Three Must-Attend AI Events
This late summer, Quadric is taking its vision for programmable, on-device AI to three of the industry’s most influential gatherings. From advanced processor design at HotChips to scalable deployment at the AI Infra Summit and physical AI at Embedded World North America, each stop offers a different opportunity to see how the… Read More
Webinar: Cutting Full-Chip SoC Debug from Days to Minutes with AI
COMPANY EMAIL REQUIRED FOR REGISTRATION
Full-chip SoC debug has become one of the most expensive bottlenecks in modern verification. A single production issue can pull multiple engineers away days as they chase a failure through waveforms, logs, and across hundreds of thousands of lines of code.
In this webinar, we will demonstrate… Read More
ESD Alliance Webinar: Gen-AI for Chip Design and Security
This webinar will present a multi-agent intelligent assistant system architected to automate and augment SoC design and security verification.
Designing functionally correct, high-performance, and provably secure system-on-chips (SoCs) has become a strategic imperative for modern computing infrastructure. Yet traditional… Read More
Webinar: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools
**Please register with professional email address**
As SoC design complexity grows and design windows shrink, EDA tools must evolve beyond traditional workflows. AI is the catalyst!
This webinar explores what the next generation of EDA tools and design platforms should look like when built with AI in the middle. We’ll… Read More
Webinar: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools
**Please register with professional email address**
As SoC design complexity grows and design windows shrink, EDA tools must evolve beyond traditional workflows. AI is the catalyst!
This webinar explores what the next generation of EDA tools and design platforms should look like when built with AI in the middle. We’ll… Read More
Chips&Media’s Next-Generation Video CODEC IP Powers Ambarella’s Expanding Edge AI Portfolio
Chips&Media has announced a strategic licensing agreement with Ambarella for its latest-generation video CODEC intellectual property (IP), marking a significant milestone in the evolution of edge AI, computer vision, and physical AI systems. The agreement follows an extensive technical evaluation process and further… Read More
How llmda.ai Coaxed Me Out of Retirement, an Interview with Kurt Shuler
Arteris is one of the most impressive companies SemiWiki has worked with over the last fifteen years. We have collaborated on one hundred and seventy-three articles/podcasts that have garnered more than two million views/listens. The success of Arteris can be easily tracked to the executive team and Kurt Shuler was the executive… Read More
CEO Interview with Geoffrey Rodgers of Chameleon Semiconductor
Geoffrey Rodgers spent most of his career at the intersection of semiconductor technology and go-to-market execution, with a focus on scaling businesses and bringing complex solutions to market. He previously led the Analog Go-To-Market motion at Synopsys following the acquisition of Analog Design Automation and held leadership… Read More
