Webinar: Application-Specific Processors (ASIPs) for Wireless Communication SoCs

Webinar: Application-Specific Processors (ASIPs) for Wireless Communication SoCs
by Admin on 04-30-2025 at 2:19 pm

Featured Speakers:

  • Dr. Falco Munsche, Technical Product Marketing, Synopsys
  • Junsu Heo, SoC Design Lab, Konkuk University, Korea

Learn about:

  • Synopsys ASIP Designer, the industry-leading tool to explore, design and optimize application-specific processors
  • ASIP design methodology to address challenges in modern wireless
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Verifying Leakage Across Power Domains

Verifying Leakage Across Power Domains
by Daniel Payne on 04-21-2025 at 10:00 am

leakage contention

IC designs need to operate reliably under varying conditions and avoid inefficiencies like leakage across power domains. But how do you verify that connections between IP blocks has been done properly? This is where reliability verification, Electrical Rule Checking (ERC) tools and dynamic simulations all come into play particularly… Read More


Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library

Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library
by Admin on 04-09-2025 at 2:36 am

As hyperscaler chiplet and SoCs grow in complexity, integrating and validating multiple high-speed and low-speed interface protocols—such as PCIe, CXL, UCIe, AMBA, AXI, AHB, CHI, CSI2, and DSI2, can be a significant challenge. Design Verification Engineers and Technical Managers must ensure seamless protocol compliance

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Webinar: Synopsys Collaboration Framework to Boost SoC/Chiplet Architecture Performance Analysis and Optimization

Webinar: Synopsys Collaboration Framework to Boost SoC/Chiplet Architecture Performance Analysis and Optimization
by Admin on 02-20-2025 at 6:46 pm

Date: March, 13 – 9 a.m. PST

Using virtual prototypes alongside early accessible performance models of new SoC or Chiplet architectures has become the de facto standard for early architecture performance modeling, exploration, and analysis. However, as designs and tools become increasingly complex, these virtual

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Podcast EP272: An Overview How AI is Changing Semiconductor and System Design with Dr. Sailesh Kumar

Podcast EP272: An Overview How AI is Changing Semiconductor and System Design with Dr. Sailesh Kumar
by Daniel Nenni on 01-31-2025 at 10:00 am

Daniel Nenni is joined by Dr. Sailesh Kumar, CEO of Baya Systems. With over two decades of experience, Sailesh is a seasoned expert in SoC, fabric, I/O, memory architecture, and algorithms. Previously, Sailesh founded NetSpeed Systems and served as its Chief Technology Officer until its successful acquisition by Intel. Sailesh… Read More


Webinar: Addressing Tomorrow’s Automotive Compute Needs with Cadence

Webinar: Addressing Tomorrow’s Automotive Compute Needs with Cadence
by Admin on 01-24-2025 at 1:25 pm

The automotive sector is transitioning to software-defined vehicles, focusing on unified compute solutions for central processing, zonal architectures, in-cabin sensing, and digital cockpits. With AI/ML enhancing vehicle functionalities, cars are becoming akin to mobile devices, especially as we advance towards autonomous… Read More


Reset Domain Crossing (RDC) Challenges

Reset Domain Crossing (RDC) Challenges
by Daniel Payne on 12-18-2024 at 10:00 am

Origin of reset trees

In the early days an IC had a single clock and a single reset signal, making it a simple matter to reset the chip into a known, stable state, so there was little need for detailed analysis. For modern designs there can be dozens to hundreds of clocks, creating separate domains and some use of asynchronous resets, so the challenge of ensuring… Read More


Alchip Technologies Sets Another Record

Alchip Technologies Sets Another Record
by Daniel Nenni on 10-14-2024 at 10:00 am

Alchip Q2 2024

The ASIC business has always been a key enabler of the semiconductor industry but it is a difficult business. In my 40 years I have seen many ASIC companies come and go but I have never seen one like Alchip.

Alchip Technologies Ltd. was founded more than 20 years ago, about half way through my career.  I know one of the founders, a fiercely… Read More


LIVE WEBINAR Maximizing SoC Energy Efficiency: The Role of Realistic Workloads and Massively Parallel Power Analysis

LIVE WEBINAR Maximizing SoC Energy Efficiency: The Role of Realistic Workloads and Massively Parallel Power Analysis
by Daniel Nenni on 07-03-2024 at 2:00 pm

The Role of Realistic Workloads and Massively Parallel Power Analysis

As the complexity of modern System-on-Chip (SoC) designs continues to rise, achieving energy efficiency measured as performance per watt has become a crucial design goal. With the increasing demand for powerful, multifunctional chips, balancing performance with power consumption has become essential. Realistic workloads… Read More


CircuitSutra Technologies at the 2024 Design Automation Conference

CircuitSutra Technologies at the 2024 Design Automation Conference
by Daniel Nenni on 06-17-2024 at 4:00 pm

DAC 2024 Banner

The Design Automation Conference (DAC) is a premier event that focuses on the design and automation of electronic systems. It is an annual conference that has been held since 1964, making it one of the longest-running and most established events in the field of electronic design automation (EDA).

DAC offers outstanding training,… Read More