Verification is a complex task that takes the majority of time and effort in chip design. Veriest shares customer views on what this means. We are an ASIC services company, and we have the opportunity to work on multiple projects and methodologies, interfacing with different experts.
In this “Verification Talks”… Read More
Who can present seventy six slides in sixty minutes, still have time for questions, AND make it interesting? Dr. Walden Rhines that’s who. Here is a link to the presentation but I have to warn you, it is a 100MB PDF file:
Design Verification Challenges: Past, Present, and Future
The DVCon conference was well attended again this year… Read More
Next week I will be at DVCON which is not to be confused with DEFCON the community of black and white hat hackers that challenge our online privacy on a daily basis. DVCON is the premier conference for the functional design and verification of our beloved electronic devices. The big draw next week of course is the keynote by Dr. Walden… Read More