ASIC Prototyping with 4M to 96M Gates

ASIC Prototyping with 4M to 96M Gates
by Daniel Payne on 09-17-2012 at 9:30 am

I’ve used Aldec tools like their Verilog simulator (Riviera PRO) when teaching a class to engineers at Lattice Semi, so to get an update about the company I spoke with Dave Rinehart recently by phone. A big product announcement by Aldec today is for their ASIC prototyping system with a capacity range of 4 Million to 96 Million… Read More