Introducing Ansys RaptorH: SoC, Mixed-Signal and RFIC Electromagnetic Modeling

Introducing Ansys RaptorH: SoC, Mixed-Signal and RFIC Electromagnetic Modeling
by Admin on 06-04-2020 at 10:30 am

June 4, 2020

10:30 AM (EDT)

Venue:
Online

Ansys RaptorH adds to Ansys’ comprehensive set of electromagnetic (EM) field solver modeling capabilities, which extend from devices to chips to full electronics systems. The enhanced on-silicon EM simulation now includes the Ansys HFSS gold-standard engine integrated into an easy-to-use

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Introducing Ansys RaptorH: SoC, Mixed-Signal and RFIC Electromagnetic Modeling

Introducing Ansys RaptorH: SoC, Mixed-Signal and RFIC Electromagnetic Modeling
by Admin on 06-02-2020 at 8:30 pm

June 2, 2020

8:30 PM (EDT)

Venue:
Online

Ansys RaptorH adds to Ansys’ comprehensive set of electromagnetic (EM) field solver modeling capabilities, which extend from devices to chips to full electronics systems. The enhanced on-silicon EM simulation now includes the Ansys HFSS gold-standard engine integrated into an easy-to-use

Read More

At Last, Package and Chip integration for RF Design

At Last, Package and Chip integration for RF Design
by Tom Simon on 01-21-2019 at 7:00 am

It seems that it has always been that there were packages and ICs, and in the design tool world “never the twain shall meet”. The tools for designing packages were completely separate from the tools used to design IC’s. This was so profoundly true that even after Cadence merged with Valid Logic back in the early 90’s, their Allegro … Read More


RFIC Design Challenges at #50DAC

RFIC Design Challenges at #50DAC
by Daniel Nenni on 05-31-2013 at 8:00 pm

RFIC developers used to favor mature silicon processes, typically staying back a couple of nodes behind the leading edge. This bought foundries time for ‘RF-enabling’ their PDKs, and also maximized return on investment for developing RF models and infrastructure IP. Not the case any more, it seems. To address the insatiable Read More