A company that gets its products to market first stands to gain a competitive edge in the market place. This is even more so in the highly competitive and innovative semiconductor industry. At the same time, designing chips is a very challenging task that involves iterative steps that are computation, memory and storage intensive.… Read More
Tag: rescale
State of Cloud HPC microSUMMIT with Rescale, Hyperion Research, and Microsoft Azure
April 7 @ 10:00 am – 11:00 am
Modern applications in science and engineering are driving demand for big compute, and the cloud HPC ecosystem is pushing forward to keep pace and drive new possibilities. Organizations are harnessing new hardware and software tools to stay competitive, agile, and collaborative in rapidly
Webinar: Rescale is Providing an On-Ramp to the Hybrid Cloud for Chip Design
We all know that design complexity is increasing at a fast pace. There’s always more analysis to run on larger and larger volumes of data. During tapeout, these demands can grow by an order of magnitude. Successful design projects need to add huge amounts of CPU, memory and storage for short bursts of time during tapeout to meet their… Read More
Webinar: 5 Reasons Why Others are Adopting Hybrid Cloud and EDA Should Too!
With the complexity of transistors at an all time high and growing foundry rule decks, fabless companies consistently find themselves in a game of catch up. Semiconductor designs require additional compute resources to maintain speed and quality of development. But deploying new infrastructures at this current speed is a tall… Read More
Accelerating EDA workload on cloud with Samsung’s SAFE-CDP powered by Rescale
Digital event | 25 November 2020 | 14:00 KST
This webinar will explore how to accelerate EDA on Rescale cloud HPC with SAFE-CDP (Samsung Advanced Foundry Ecosystem Cloud Design Platform).
Agenda:
- What is SAFE-CDP and how can fabless customers benefit from one-stop cloud-based design platform? – Youngmin Kim
- Designing