AI-Leader Horizon Robotics Selects NetSpeed AI-based NoC IP For Next Generation Designs

AI-Leader Horizon Robotics Selects NetSpeed AI-based NoC IP For Next Generation Designs
by Mitch Heins on 02-05-2018 at 7:00 am

Image RemovedIf you haven’t noticed, there has been a BIG influx of money into Artificial Intelligence (AI) technologies. Most recently, the Chinese government announced that AI is one of their top initiatives with a goal to catch up with the United States within 3 years and to be the world leader in AI by the year 2030. Horizon Robotics,… Read More


Software Defined Networks (on Chip) – NetSpeed Systems and UltraSoC Team Up to Use Embedded Analytics to Enable Next Generation SoCs

Software Defined Networks (on Chip) – NetSpeed Systems and UltraSoC Team Up to Use Embedded Analytics to Enable Next Generation SoCs
by Mitch Heins on 10-28-2017 at 7:00 am

Image RemovedNetSpeed Systems is known for their network-on-chip (NoC) IP that enables complex heterogeneous SoC architectures. NetSpeed IP supports both non-coherent and coherent memory and I/O schemes as well as configurable, customized last level cache optimization through their Orion, Gemini and Pegasus IP respectively.… Read More


AI Based Software Designing AI Based Hardware – Autonomous Automotive SoC Platform

AI Based Software Designing AI Based Hardware – Autonomous Automotive SoC Platform
by Mitch Heins on 10-10-2017 at 12:00 pm

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For those of you who missed the NetSpeed Systems, Imagination Technologies webinar, “Alexa, can you help me build a better SoC”, you’ll be happy to hear that the session was recorded and can still be viewed (see link at the bottom of this page). I’ll warn you now however, that this was a high-bandwidth session packed … Read More


NetSpeed’s Pegasus Last-Level Cache IP Improves SoC Performance and Reduces Latency

NetSpeed’s Pegasus Last-Level Cache IP Improves SoC Performance and Reduces Latency
by Mitch Heins on 07-17-2017 at 7:00 am

Memory is always a critical resource for a System-on-Chip (SoC) design. It seems like designers are always wanting more memory, and the memory they have is never fast enough to keep up with the processors, especially when using multi-core processors and GPUs. To complicate matters, today’s SoC architectures tend to share memory… Read More


NetSpeed Bridges the Gap Between Architecture and Implementation

NetSpeed Bridges the Gap Between Architecture and Implementation
by Mitch Heins on 12-29-2016 at 11:30 am

Image RemovedThis is part II of an article covering NetSpeed’s network-on-chip (NoC) offerings. This article dives a little deeper into what a NoC is and how NetSpeed’s network synthesis tool, NocStudio, helps system architects optimize a NoC for their system-on-a-chip (SoC) design.

Traditionally IC designers have used proprietary… Read More


It’s a heterogeneous world and cache rules it now

It’s a heterogeneous world and cache rules it now
by Don Dingee on 09-28-2016 at 4:00 pm

Cache evolved when the world was all about homogeneous processing and slow and expensive shared memory. Now, compute is just part of the problem – devices need to handle display, connectivity, storage, and other tasks, all at the same time. Different, heterogeneous cores handle different workflows in the modern SoC, and the burden… Read More


SoC QoS gets help from machine learning

SoC QoS gets help from machine learning
by Don Dingee on 07-29-2016 at 4:00 pm

Several companies have attacked the QoS problem in SoC design, and what is emerging from that conversation is the best approach may be several approaches combined in a hybrid QoS solution. At the recent Linley Group Mobile Conference, NetSpeed Systems outlined just such a solution with an unexpected plot twist in synthesis.

The… Read More