Predictions in technology adoption often hinge on a delicate balance between technical feasibility and market dynamics. While business considerations play a pivotal role, the technical category reasons for the success or failure of a prediction are more tangible and often easier to identify—if scrutinized with care. However,… Read More
Tag: multi-die
Webinar: The Impact on the Automotive Market as Chips Transform Into 3D Systems
The automotive industry stands on the cusp of a technological renaissance, ushering in an era where vehicles aren’t just tools of transportation, but interconnected nodes within a vast network of software-defined mobility. Central to this transformation is the concept of chiplets—miniaturized, modular components… Read More
Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More
Synopsys Design IP for Modern SoCs and Multi-Die Systems
Semiconductor intellectual property (IP) plays a critical role in modern system-on-chip (SoC) designs. That’s not surprising given that modern SoCs are highly complex designs that leverage already proven building blocks such as processors, interfaces, foundational IP, on-chip bus fabrics, security IP, and others. This… Read More
Chiplet Interconnect Challenges and Standards
For decades now I’ve watched the incredible growth of SoCs in terms of die size, transistor count, frequency and complexity. Instead of placing all of the system complexity into a single, monolithic chip, there are now compelling reasons to use a multi-chip approach, like when the maximum die size limit is reached, or it’s… Read More
UCIe Specification Streamlines Multi-Die System Design with Chiplets
Over the last few years, the design of application-specific ICs as well as high-performance CPUs and other complex ICs has hit a proverbial wall. This wall is built from several issues: first, chip sizes have grown so large that they can fill the entire mask reticle and that could limit future growth. Second, the large chip size impacts… Read More
Delivering Systemic Innovation to Power the Era of SysMoore
With the slowing down of Moore’s law , the industry as a whole has been working on various ways to maintain the rate of growth and advancements. A lot has been written up about various solutions being pursued to address specific aspects. The current era is being referred to by different names, SysMoore being one that Synopsys uses.… Read More