RISC-V Virtualization and the Complexity of MMUs

RISC-V Virtualization and the Complexity of MMUs
by Bernard Murphy on 05-08-2025 at 7:00 am

Virtual memory mapping

In the early days of RISC-V adoption, applications were microcontroller-centric with no need for virtualization support. But horizons expanded and now RISC-V is appearing in application processors, very much needing to be able to virtualize multiple apps concurrently. Take another step forward to datacenter servers running… Read More


Is ARC HS4xD Family More a CPU or DSP IP Core?

Is ARC HS4xD Family More a CPU or DSP IP Core?
by Eric Esteve on 06-02-2017 at 4:00 pm

When I had to define the various IP categories (processor, analog & mixed-signal, wired interfaces, etc.) to build the Design IP Report, I scratched my head for a while about the processor main category: how to define the sub-categories? Not that long ago, it was easy to identify a CPU IP core and a DSP IP core. As of today, if a DSP… Read More


Linux and the ARC of the Coherent

Linux and the ARC of the Coherent
by Don Dingee on 10-18-2014 at 7:00 am

Remember that thing called “real-time Linux”? Yeah, nobody else does either. As builds became configurable and clock speeds increased, embedded Linux manifested itself as fast enough for many applications – if a few other SoC details are addressed.

Most obvious for SoCs to run Linux is the need for a fully integrated MMU implementation.… Read More