Chiplets Open Pandora’s Box

Chiplets Open Pandora’s Box
by Daniel Nenni on 01-31-2024 at 6:00 am

Chiplet

Chiplets have simplified one area of design but opened pandora’s box on another front. The simulation complexity of each chiplet is lower but now the chiplet-to-chiplet interconnect has become complex. Folks are experimenting with different interconnect protocols, variations of UCIe, modifying UCIe settings, interface… Read More


Webinar: DENSO discusses Verification of network relay performance using VisualSim

Webinar: DENSO discusses Verification of network relay performance using VisualSim
by Admin on 05-09-2023 at 1:33 pm

DENSO discusses Verification of network relay performance using VisualSim

Overview: Efficient in-vehicle network development through simulation combining network and ECU hardware and software elements

Date: May 24, 2023 | Wednesday

Time Zone:

Japan – 3:00 PM (In Japanese)
Asia – 3:00 PM Korea | 2:00PM China … Read More


Rethinking the System Design Process

Rethinking the System Design Process
by Daniel Nenni on 12-08-2022 at 10:00 am

Rethinking the System Design Process 1

The system design process can incorporate linear thinking, parallel thinking, or both, depending on the nature of the anticipated system, subsystem, or element of a subsystem. The structure, composition, scale, or focal point of a new/incremental system design incorporates the talents and gifts of the designer in either a … Read More


Webinar: Accelerated development in Automotive E/E Systems using VisualSim Architect

Webinar: Accelerated development in Automotive E/E Systems using VisualSim Architect
by Admin on 11-07-2022 at 3:01 pm

We have put together a webinar on November 10th titled: Accelerated development in Automotive E/E Systems using VisualSim Architect . We will provide an introduction to the available features and utilities in VisualSim architect for Automotive Networking, Hardware ECU and Software design exploration. We will… Read More


Webinar: Evaluating UCIe based multi-die SoC to meet timing and power

Webinar: Evaluating UCIe based multi-die SoC to meet timing and power
by Admin on 10-24-2022 at 2:06 pm

Description

Multi-die designs allow systems engineering to pack more functionality with different timing and power constraints into a single package. Older generation multi-die split the dies into high-speed and low speed. Newer, high-performance multi-die System-on-Chip (SoC) requires interaction between memories… Read More


Webinar: Architecture similarities in Auto Networks, Radars, and Semiconductors- USA

Webinar: Architecture similarities in Auto Networks, Radars, and Semiconductors- USA
by Admin on 09-22-2022 at 2:33 pm

The buzzwords of 2022 are autonomous driving, radars, and semiconductor and they are all similar in more than one-way.

  • All have protocols, schedulers, sensors, high performance computing, software, networks, interfaces, antennas, and attenuators.
  • VisualSim Architect is used to architect and verify all these applications.
Read More

Podcast EP43: Navigating the Architecture Exploration Jargons and What Do They Mean to a Chip Architect?

Podcast EP43: Navigating the Architecture Exploration Jargons and What Do They Mean to a Chip Architect?
by Daniel Nenni on 10-15-2021 at 10:00 am

Dan is joined by Deepak Shankar, founder of Mirabilis Design. Dan explores the application and impact of architectural exploration on chip and system design.

The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, and not to the speaker’s employer, organization, committee or any other group… Read More


Architecture Exploration with Miribalis Design

Architecture Exploration with Miribalis Design
by Deepak Shankar on 07-23-2021 at 6:00 am

AE1

Architectural exploration is a vast area of engineering design. It starts with the planning phase where the designer will have the list of requirements from the customer and the rough architecture most likely on a paper. Next is to assemble the model and conduct variety of trade-offs for optimization and functional studies to … Read More


CEO Interview: Deepak Shankar of Mirabilis Design

CEO Interview: Deepak Shankar of Mirabilis Design
by Daniel Nenni on 06-11-2021 at 6:00 am

Deepak Shankar Mirabilis

The founder of Mirabilis Design, Mr. Shankar has over two decades of experience in management and marketing of system level design tools. Prior to establishing Mirabilis Design, he held the reins as Vice President, Business Development at MemCall, a fabless semiconductor company and SpinCircuit, a joint venture of industry… Read More