Getting EDA Across the Chasm: 15 Rules Before and 5 After

Getting EDA Across the Chasm: 15 Rules Before and 5 After
by Paul McLellan on 10-02-2015 at 7:00 am

Crossing the Chasm by Geoffrey Moore (not that G. Moore!) is one of the most well known books on high technology marketing. When I worked at VaST, Mohr Davidow Ventures (MDV) invested in us and Moore (not Mohr), who was a partner there, spent an afternoon with us brainstorming what it would take for us to cross the chasm. Coincidentally,… Read More


Ensuring Safety Distinctive Design & Verification

Ensuring Safety Distinctive Design & Verification
by Pawan Fangaria on 12-21-2014 at 12:00 pm

In today’s world where every device functions intelligently, it automatically becomes active on any kind of stimulus. The problem with such intelligence is that it can function unfavorably on any kind of bad stimulus. As the devices are complex enough in the form of SoCs (which at advanced process nodes are more susceptible to … Read More


Effective Verification Coverage through UVM & MDV

Effective Verification Coverage through UVM & MDV
by Pawan Fangaria on 03-10-2014 at 5:00 pm

In the current semiconductor design landscape, the design size and complexity of SoCs has grown to large extent with stable tools and technologies that can take care of integrating several IPs together. With that mammoth growth in designs, verification flows are evolving continuously to tackle the verification challenges … Read More


SoC Functional Verification Planning and Management Goes Big

SoC Functional Verification Planning and Management Goes Big
by Daniel Payne on 02-24-2014 at 10:01 am

Big SoC designs typically break existing EDA tools and old methodologies, which then give rise to new EDA tools and methodologies out of necessity. Such is the case with the daunting task of verification planning and management where terabytes of data have simply swamped older EDA tools, making them unpleasant and ineffective… Read More