Founded in 1984, Silvaco is now the largest privately held EDA company with a rich history including a recent transformation that is worth a blog if not a book. Coincidently, I started my career in Silicon Valley in 1984 and have had many dealings with Silvaco over the years including a personal relationship with Silvaco founder … Read More
Tag: invarian
Silvaco Swallows Invarian
Yesterday, Silvaco announced that it has acquired Invarian Inc. Details of the transaction were not disclosed.
Who is Invarian? They are a recognized leader in block-level to full-chip sign-off analysis for complex, high-performance ICs. Their unique methodology utilizes a parallel architecture and concurrent power-voltage-thermal… Read More
Analysis of Power, Thermal, EM, IR at DAC
Most EDA start-up companies have a narrow product focus to complement existing tool flows, however Invarian is taking a much bolder approach by offering tools for:
- Power analysis
- Thermal analysis
- EM / IR analysis
- 3D Thermal analysis
The Ugly Stepchild of Physical Verification – Thermal!
Thermal analysis has traditionally been given short shrift when compared to other more prominent issues facing chip designers. Invarian, to my eye at least, feels that the winds of change are in the air. Not that power or EM/IR issues will fade, that indeed is not the case and in fact quite the contrary, they are contributors to the… Read More
CEO Interview: Jens Andersen of Invarian
Invarian is an interesting EDA company that sees a niche market opening in the physical verification space. There are a number of converging factors driving this opportunity. Electromigration and voltage-drop for full-chip analysis demands SPICE level accuracy with fast runtimes. Invarian solves that problem with macro … Read More
3D Thermal and Mechanical Stress for IC Packaging
3D has been a growing buzz word in IC design and packaging for several years now, so it’s refreshing to actually find an EDA vendor that has developed tools to help analyze something like 3D thermal and mechanical stress at DAC. … Read More
Nanometer Circuit Verification Forum
Verifying circuits on advanced process nodes has always been difficult, and it’s no easier with today’s nanometer CMOS processes. There’s a great paradox in nanometer circuit design and verification. Designers achieve their greatest differentiation when they implement analog, mixed-signal, RF and custom … Read More
Two More Transistor-Level Companies at DAC
In my rush on Wednesday at DAC I had almost over-looked the last two companies I talked with: Invarian and AnaGlobe. These last two I had hand-written notes on paper, so I just got to the bottom of my inbox tonight to write up the final trip reports.
Invarian
Jens Andersen and Vladimir Schellbach gave me an overview of tools that perform… Read More