As the SoC design size, complexity and functionality keeps on increasing with multiple IPs packed together and design time and time-to-market keeps on decreasing amid critical constraints on PPA, there is no other alternative than to do the design first-time-right not to miss the window of opportunity. And that could be possible… Read More
In the dim and distant past, if you wanted to learn how to use a particular EDA tool then you would go on a training course. This would often be multiple days and often a significant dollar investment too. For most EDA companies, that option still exists and the big 3 have quite extensive training catalogs.
But nowadays it is often easier… Read More
I blame it on Henry Ford, William Levitt, and the NY State Board of Regents, among others. We went through a phase with this irresistible urge to stamp out blocks of sameness, creating mass produced clones of everything from cars to houses to students.
Thank goodness, that’s pretty much over. The thinking of simplifying system design… Read More
Is it really a surprise if Qualcomm, the undisputed leader of Application Processor (AP) and BaseBand (BB) IC for wireless mobile, already one of the Arteris investors (with ARM, Synopsys, Docomo Capital and a bunch of VC), eventually acquires the best NoC IP technology (the technology, the engineering team and the rights, but… Read More
At a dinner table a couple years ago, someone quietly shared their biggest worry in EDA. Not 2GHz, or quad core. Not 20nm, or 450mm. Not power, or timing closure. Call it The Rollover. It’s turned out to be the right worry.
Best brains spent inordinate hours designing and verifying a big, hairy, heavy breathing processor core to do … Read More