Background
Traditionally, the interface between chip designers and system power, packaging, reliability, and mechanical engineering teams was a relatively straightforward exchange of specifications. Chip designers developed preliminary power dissipation estimates, often based on a simplifying power/mm**2 value. … Read More
Tag: electrothermal signoff
Webinar: Electrothermal Signoff for 2.5D and 3D IC Systems
The move from single-chip design to system-in-package design has created many challenges. The rise of 2.5D and 3D technology has set the stage for this. Beyond the modeling requirements and the need for ecosystem collaboration to get those models, there is a significant challenge in understanding the data. The only way to truly… Read More