32Mb Embedded STT-MRAM in ULL 22nm CMOS Achieves 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150C and High Immunity to Magnetic Field Interference presented at ISSCC2020
1. Motivation for STT-MRAM in Ultra-Low-Leakage 22nm Process
TSMC’s embedded Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)… Read More
Technological leadership has long been key to TSMC’s success and they are following up their leadership development of 5nm with the world’s smallest SRAM cell at 0.021um 2 with circuit design details of their write assist techniques necessary to achieve the full potential of this revolutionary technology. In addition to their… Read More
Back in April, 2019, TSMC announced that they were introducing their 5 nm technology in risk production and now at IEDM 2019 they brought forth a detailed description of the process which has passed 1000 hour HTOL and will be in high volume production in 1H 2020. This 5nm technology is a full node scaling from 7nm using smart scaling… Read More
One of the many benefits of blogging for SemiWiki is the free conference passes and buffet lunches, absolutely. IEDM is one of the more prestigious semiconductor conferences, now in its 65th year, is being held at the Hilton Hotel in San Francisco’s famed Union Square this week. This year more than 1,910 semiconductor professionals… Read More
