IC designs have physical verification applications like Layout Versus Schematic (LVS) at the transistor-level to ensure that layout and schematics are equivalent, in addition there’s an Electrical Rules Check (ERC) for connections to well regions called a soft check. The connections to all the devices needs to have the most… Read More
Tag: daniel payne
Automotive Upate at Arm DevSummit from VW
Although our family has down-sized to just one vehicle, my dream car is still a Tesla, both because it’s an EV and they have a vision for autonomous vehicles. At the recent Arm DevSummit I watched a fireside chat with Alexander Hitzinger, CEO of Artemis, the skunkworks at Audi, part of the Volkswagen Group. I knew that Audi … Read More
CEO Interview: Jason Xing of Empyrean Software
It’s been about seven years since Randy Smith last interviewed Jason Xing, the President/CEO of North America for Empyrean Software, so the timing felt good for a fresh update. I’ve been watching Empyrean at DAC for several years now, and have come away impressed with their growth and focus on some difficult IC design… Read More
Improving Yield and Reliability with In-Chip Monitoring, there’s an IP for that
There’s an old maxim that you can only improve what you measure, so quality experts have been talking about this concept for decades and our semiconductor industry has been the recipient of such practices to such an extent that we can now buy consumer products that include chips with over 5 billion transistors in them. You’ve… Read More
A New Kind of Analog EDA Company
My IC design career started out with circuit design of DRAMS, so I got to quickly learn all about transistor-level design at the number one IDM in the world, Intel at the time. In the early days, circa 1978 we circuit designers actually had few EDA tools, mostly a SPICE circuit simulator followed by manual extraction, manual netlisting,… Read More
What to Expect from Methodics at DAC
I’ve been visiting DAC for decades now, at first as an EDA vendor and since 2004 as a freelance EDA consultant. There’s always a buzz about what’s new, semiconductor industry trends, who is getting acquired and the latest commercial EDA and IP offerings. There’s so much vying for my attention at DAC each… Read More
Worldwide Design IP Revenue Grew 12.4% in 2017
When starting SemiWiki we focused on three market segments: EDA, IP, and the Foundries. Founding SemiWiki bloggers Daniel Payne and Paul McLellan were popular EDA bloggers with their own sites and I blogged about the foundries so we were able to combine our blogs and hit the ground running. For IP I recruited Dr. Eric Esteve who had… Read More
Automotive Mega-trends, Safety and Requirements Management
I come from a car-centric family where my father actually bought and sold over 300 vehicles in his lifetime, so automotive mega-trends pique my interest. A new conference called Semiconductors ISO 26262 held it’s first annual event last month, meeting in Munich with guest speakers from some impressive companies like: … Read More
Designing an SoC for 3D TV Without using the Funny Glasses
In the blur of activities at DAC last year I visited the Mentor booth a few times and had just a few minutes to glance at a 3D TV display that didn’t require me to wear any funny glasses, kind of novel I thought at the time because I’ve read that the market of 3D TV sets is being hampered by requiring viewers to wear glasses. The… Read More
Protecting electronics around the world, SEMI insights
SEMI is a worldwide organization with local chapters like the one here in Oregon, where I attended a recent half-day presentation by several industry experts on the topic – Globalization, How it shapes the Semiconductor industry:
- Michael Chen, Director, Mentor – A Siemens Business
- John Brewer, CEO, Amorphyx
- Ed