In a significant milestone for the semiconductor industry, Teradyne was honored as the 2025 TSMC Open Innovation Platform® Partner of the Year for TSMC 3DFabric® Testing. This award, announced on September 25, 2025, underscores the deep collaboration between Teradyne, a leader in automated test equipment and robotics, and… Read More
Tag: chiplets
The IO Hub: An Emerging Pattern for System Connectivity in Chiplet-Based Designs
In chiplet-based design we continue the march of Moore’s Law by scaling what we can put in a semiconductor package beyond the boundaries of what we can build on a single die. This style is already gaining traction in AI applications, high performance computing, and automotive, each of which aims to scale out to highly integrated … Read More
Revolutionizing Chip Packaging: The Impact of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)
In an era dominated by artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC), the demand for semiconductors that deliver high data throughput, low latency, and energy efficiency has never been greater. Traditional chip designs often struggle to keep pace with these requirements, leading… Read More
SEMICON Taiwan 2025
Leading with Collaboration. Innovating with the World.
SEMICON Taiwan 2025 will take place from September 10–12, 2025 at the Taipei Nangang Exhibition Center!
This year’s exhibition will bring together over 1,100 leading semiconductor and technology companies, with more than 4,000 booths and an expected attendance of over… Read More
Alphawave Semi and the AI Era: A Technology Leadership Overview
The explosion of artificial intelligence (AI) is transforming the data center landscape, pushing the boundaries of compute, connectivity, and memory technologies. The exponential growth in AI workloads—training large language models (LLMs), deploying real-time inference, and scaling distributed applications—has … Read More
Altair SimLab: Tackling 3D IC Multiphysics Challenges for Scalable ECAD Modeling
The semiconductor industry is rapidly moving beyond traditional 2D packaging, embracing technologies such as 3D integrated circuits (3D ICs) and 2.5D advanced packaging. These approaches combine heterogeneous chiplets, silicon interposers, and complex multi-layer routing to achieve higher performance and integration.… Read More
Arteris at the 2025 Design Automation Conference #62DAC
Key Takeaways:
- Expanded Multi-Die Solution: Arteris showcases its foundational technology for rapid chiplet-based innovation. Check out the multi-die highlights video.
- Ecosystem compatibility: Supported through integration with products from major EDA and foundry partners, including Cadence, Synopsys, and global
Keysight at the 2025 Design Automation Conference #62DAC
Keysight Showcases AI-Ready EDA and Multi-Physics Innovation at #62DAC
Design engineers attending #62DAC who focus on Design Data & IP Management, Analog, Mixed-Signal, RFIC, MMIC, or Multi-Physics should make booth #1408 a top destination. I had the opportunity to speak with Simon Rance, General Manager & Business… Read More
Podcast EP288: How Alphawave Semi Enables Next Generation Connectivity with Bharat Tailor
Dan is joined by Bharat Tailor who is responsible for the Alphawave standard connectivity products portfolio focused on DSP chipsets enabling AI data center interconnects. He is a veteran of the high-speed connectivity semiconductor industry having participated in the evolution of connectivity technologies from 10Gbps … Read More
ESD Alliance Executive Outlook Features View of How Multi-Physics is Reshaping Chip Design and EDA Tools
Every spring, the ESD Alliance, a SEMI Technology Community, organizes a get together where industry executives and experts gather to network and talk about trends in the electronic design automation industry.
The theme of this year’s event, once again co-hosted by Keysight, is “How Multi-Physics is Reshaping Chip Design and… Read More