Altair SimLab: Tackling 3D IC Multiphysics Challenges for Scalable ECAD Modeling

Altair SimLab: Tackling 3D IC Multiphysics Challenges for Scalable ECAD Modeling
by Kalar Rajendiran on 07-10-2025 at 10:00 am

What is SimLab

The semiconductor industry is rapidly moving beyond traditional 2D packaging, embracing technologies such as 3D integrated circuits (3D ICs) and 2.5D advanced packaging. These approaches combine heterogeneous chiplets, silicon interposers, and complex multi-layer routing to achieve higher performance and integration.… Read More


Arteris at the 2025 Design Automation Conference #62DAC

Arteris at the 2025 Design Automation Conference #62DAC
by Daniel Nenni on 06-22-2025 at 8:00 am

62nd DAC SemiWiki

Key Takeaways:

  • Expanded Multi-Die Solution: Arteris showcases its foundational technology for rapid chiplet-based innovation. Check out the multi-die highlights video.
  • Ecosystem compatibility: Supported through integration with products from major EDA and foundry partners, including Cadence, Synopsys, and global
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Keysight at the 2025 Design Automation Conference #62DAC

Keysight at the 2025 Design Automation Conference #62DAC
by Daniel Nenni on 06-19-2025 at 10:00 am

62nd DAC SemiWiki

Keysight Showcases AI-Ready EDA and Multi-Physics Innovation at #62DAC

Design engineers attending #62DAC who focus on Design Data & IP Management, Analog, Mixed-Signal, RFIC, MMIC, or Multi-Physics should make booth #1408 a top destination. I had the opportunity to speak with Simon Rance, General Manager & Business… Read More


Podcast EP288: How Alphawave Semi Enables Next Generation Connectivity with Bharat Tailor

Podcast EP288: How Alphawave Semi Enables Next Generation Connectivity with Bharat Tailor
by Daniel Nenni on 05-23-2025 at 10:00 am

Dan is joined by Bharat Tailor who is responsible for the Alphawave standard connectivity products portfolio focused on DSP chipsets enabling AI data center interconnects. He is a veteran of the high-speed connectivity semiconductor industry having participated in the evolution of connectivity technologies from 10Gbps … Read More


Webinar: In-Field RAS Challenges with Chiplets and AI-based Systems

Webinar: In-Field RAS Challenges with Chiplets and AI-based Systems
by Admin on 04-24-2025 at 11:26 am

Featured Speakers:

  • Jyotika Athavale, Director, Engineering Architecture, Synopsys
  • Yervant Zorian, Chief Architect & Fellow, Synopsys

Abstract:

Advancements in data center and automotive System-on-Chips (SoCs) to meet AI workload demands have resulted in the increased adoption of emerging technology nodes and chiplet… Read More


ESD Alliance Executive Outlook Features View of How Multi-Physics is Reshaping Chip Design and EDA Tools

ESD Alliance Executive Outlook Features View of How Multi-Physics is Reshaping Chip Design and EDA Tools
by Bob Smith on 04-24-2025 at 6:00 am

CEO Outlook #2 (1)

Every spring, the ESD Alliance, a SEMI Technology Community, organizes a get together where industry executives and experts gather to network and talk about trends in the electronic design automation industry.

The theme of this year’s event, once again co-hosted by Keysight, is “How Multi-Physics is Reshaping Chip Design and… Read More


Podcast EP276: How Alphawave Semi is Fueling the Next Generation of AI Systems with Letizia Giuliano

Podcast EP276: How Alphawave Semi is Fueling the Next Generation of AI Systems with Letizia Giuliano
by Daniel Nenni on 02-28-2025 at 10:00 am

Dan is joined by Letizia Giuliano, Vice President of Product Marketing and Management at Alphawave Semi. She specializes in architecting cutting-edge solutions for high-speed connectivity and chiplet design architecture. Prior to her role at Alphawave Semi, Letizia held the position of Product Line Manager at Intel, where… Read More


Harnessing Modular Vector Processing for Scalable, Power-Efficient AI Acceleration

Harnessing Modular Vector Processing for Scalable, Power-Efficient AI Acceleration
by Jonah McLeod on 02-24-2025 at 6:00 am

shutterstock 2425981653

The dominance of GPUs in AI workloads has long been driven by their ability to handle massive parallelism, but this advantage comes at the cost of high-power consumption and architectural rigidity. A new approach, leveraging a chiplet-based RISC-V vector processor, offers an alternative that balances performance, efficiency,… Read More


Embracing the Chiplet Journey: The Shift to Chiplet-Based Architectures

Embracing the Chiplet Journey: The Shift to Chiplet-Based Architectures
by Kalar Rajendiran on 02-12-2025 at 6:00 am

Chiplets A New Abstraction Layer

The semiconductor industry is facing a paradigm shift. Traditional scaling, once driven by Moore’s Law, is slowing down. For years, moving to smaller process nodes led to lower transistor costs and better performance. However, scaling from node to node now offers fewer benefits as wafer costs rise much more than the historical… Read More