Webinar: Accelerating Electric Vehicle Development: Integrated design flow for power modules with functional safety and reliability focus

Webinar: Accelerating Electric Vehicle Development: Integrated design flow for power modules with functional safety and reliability focus
by Admin on 10-28-2024 at 3:33 pm

Join us for an insightful webinar series, where we explore the rapidly evolving automotive landscape. We will focus on the rise of autonomous and electric vehicles, highlighting key trends such as ADAS, software-defined vehicles, and zonal architectures.

Learn how Cadence’s advanced automotive solutions address the increasing… Read More


Webinar: The Future of Automotive: Exploring Emerging Trends and Innovative System Design with Cadence

Webinar: The Future of Automotive: Exploring Emerging Trends and Innovative System Design with Cadence
by Admin on 10-28-2024 at 3:31 pm

Join us for an insightful webinar series, where we explore the rapidly evolving automotive landscape. We will focus on the rise of autonomous and electric vehicles, highlighting key trends such as ADAS, software-defined vehicles, and zonal architectures.

Learn how Cadence’s advanced automotive solutions address the increasing… Read More


Podcast EP255: The Growing Proliferation of Semiconductors and AI in Cars with Amol Borkar

Podcast EP255: The Growing Proliferation of Semiconductors and AI in Cars with Amol Borkar
by Daniel Nenni on 10-25-2024 at 10:00 am

Dan is joined by Amol Borkar, Product Marketing Director at Cadence. Since joining in 2018 as a senior product manager, he has led the development of many successful hardware and software products, including Tensilica’s latest Vision 331 and Vision 341 DSPs and 4DR accelerator targeted for various vision, automotive and AI edge… Read More


Webinar: AI-Driven Constraint Generation for PCB and IC Package Design

Webinar: AI-Driven Constraint Generation for PCB and IC Package Design
by Admin on 10-24-2024 at 3:12 pm

While constraint-driven design is not a new concept, the demand for automation and integration between design and analysis tools has grown with increasing design complexity. Optimizing constraints with AI/ML is a driving force for the productivity necessary to address today’s compressed design cycles. Tight integration… Read More


Addressing Reliability and Safety of Power Modules for Electric Vehicles

Addressing Reliability and Safety of Power Modules for Electric Vehicles
by Kalar Rajendiran on 10-23-2024 at 10:00 am

Cadence Power Module Design Process

As electric vehicles (EVs) gain widespread adoption, safety, reliability, and efficiency are becoming increasingly important. A crucial component in ensuring these aspects is the power module (PM), which manages the energy flow between the EV battery and the motor. The design of these power modules must not only meet the high-performance… Read More


Bird’s Eye View Magic: Cadence Tensilica Product Group Pulls Back the Curtain

Bird’s Eye View Magic: Cadence Tensilica Product Group Pulls Back the Curtain
by Bernard Murphy on 09-18-2024 at 6:00 am

car 5 copy small

Even for experienced technologists some technologies can seem almost indistinguishable from magic. One example is the bird’s eye camera view available on your car’s infotainment screen. This view appears to be taken from a camera hovering tens of feet above your car. As an aid to parallel parking, it’s a brilliant invention; … Read More


Accellera and PSS 3.0 at #61DAC

Accellera and PSS 3.0 at #61DAC
by Daniel Payne on 09-03-2024 at 10:00 am

PSS at #61DAC min

Accellera invited me to attend their #61DAC panel discussion about the new Portable Stimulus Standard (PSS) v3.0, and the formal press release was also just announced. The big idea with PSS is to enable seamless reuse of stimulus across simulation, emulation and post-silicon debug and prototyping.

Tom Fitzpatrick from Siemens… Read More


Intel and Cadence Collaborate to Advance the All-Important UCIe Standard

Intel and Cadence Collaborate to Advance the All-Important UCIe Standard
by Mike Gianfagna on 09-02-2024 at 10:00 am

Intel and Cadence Collaborate to Advance the All Important UCIe Standard

The Universal Chiplet Interconnect Express™ (UCIe™) 1.0 specification was announced in early 2022 and a UCIe 1.1 update was released on August 8, 2023. This open standard facilitates the heterogeneous integration of die-to-die link interconnects within the same package. This is a fancy way of saying the standard opens the door… Read More


Overcoming Verification Challenges of SPI NAND Flash Octal DDR

Overcoming Verification Challenges of SPI NAND Flash Octal DDR
by Kalar Rajendiran on 08-22-2024 at 10:00 am

Typical Octal Serial NAND Device

As the automotive industry continues to evolve, the demands for high-capacity, high-speed storage solutions are intensifying. Autonomous vehicles and V2X (Vehicle-to-Everything) communication systems generate and process massive amounts of data, necessitating advanced storage technologies capable of meeting these… Read More


The Impact of UCIe on Chiplet Design: Lowering Barriers and Driving Innovation

The Impact of UCIe on Chiplet Design: Lowering Barriers and Driving Innovation
by Kalar Rajendiran on 08-15-2024 at 6:00 am

Comparative Analysis of Chiplet Interconnect Standards (Physical Layer)

The semiconductor industry is experiencing a significant transformation with the advent of chiplet design, a modular approach that breaks down complex chips into smaller, functional blocks called chiplets. A chiplet-based design approach offers numerous advantages, such as improved performance, reduced development … Read More