Don’t miss our upcoming webinar, where we’ll explore the importance of safety in automotive design. This session will focus on the customer’s high demand for integrated safety flows in verification, digital, and analog design. We’ll showcase the exceptional value of the Midas Safety Platform for… Read More
Don’t miss our upcoming webinar, where we’ll explore the importance of safety in automotive design. This session will focus on the customer’s high demand for integrated safety flows in verification, digital, and analog design. We’ll showcase the exceptional value of the Midas Safety Platform for… Read More
Parasitic extraction is a crucial step during the design implementation and signoff phase. Accurate reporting of parasitic Rs and Cs in a layout has always been a challenge as DSPF file format traditionally used for this purpose, is often limiting in terms of interactivity and efficiency. Join our webinar to learn about revolutionary… Read More
Creating custom blocks in Virtuoso using today’s advanced technology nodes becomes even more complex due to the vast number of design rules. Invoking a typical GUI to launch multiple DRC runs to confirm your progress and understanding of these complex rules can be very time consuming. Join this webinar to learn how to … Read More
The Spectre Simulation Platform is a solution for accurate analog simulation.
Multiple requirements for analog, RF, memory and mixed-signal IC design and verification teams
Built-in solvers simplify and speed up circuit, block and system level simulation tasks.
This seminar will introduce industry-leading Spectre Simulation … Read More
The automotive industry is evolving rapidly with the increasing demand for intelligent, connected, and autonomous vehicles. Central to this transformation are System-on-Chip (SoC) designs, which integrate multiple processing units into a single chip for managing everything from safety systems to in-car entertainment.… Read More
The development of electric vehicles (EVs) is key to transitioning to sustainable transportation. However, designing high-performance EVs presents significant challenges, particularly in power module design. Power modules, including inverters, bulky DC capacitors, power management ICs (PMICs), and battery packs, … Read More
Modern simulators map logic designs into software to compile for native execution on target hardware. Can this compile step be further optimized? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas.… Read More
Overview
Are you ready to learn and share your ideas about the latest formal verification best practices? We are pleased to invite you to one of our in-person sessions to extend your verification expertise and learn about the latest advances in the field.
Hear from members of the Cadence Jasper expert team about the technology roadmap.… Read More
Overview
Are you ready to learn and share your ideas about the latest formal verification best practices? We are pleased to invite you to one of our in-person sessions to extend your verification expertise and learn about the latest advances in the field.
Hear from members of the Cadence Jasper expert team about the technology roadmap.… Read More
