As usual in January we start with a look back at the papers we reviewed last year. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series on research ideas. As always, feedback welcome.
This webinar provides engineers with a science-driven framework for power supply design, rooted in the physics of electromagnetic energy flow. Inspired by Ralph Morrison’s pioneering approach, the session begins with core principles of energy behavior, then explores how current, fields, and waves interact inside
Join us on April 16 for CadenceLIVE Silicon Valley 2026, where Cadence technology users connect with the engineers and industry leaders who develop the solutions and the industry experts who influence market trends.
Participants experience a day of learning, connection, and cutting-edge technology shaping the future of electronic… Read More
Bug localization continues to be a challenge for both bug triage and root-cause analysis. Agentic approaches suggest a way forward. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series on research ideas.… Read More
In a bold move that underscores the accelerating convergence of electronic design automation (EDA) and mechanical engineering, Cadence Design Systems announced its agreement to acquire Hexagon AB’s Design & Engineering (D&E) business for approximately €2.7 billion, equivalent to about $3.16 billion. This… Read More
2025 Keynote Addresses from Industry Leaders:
Alphawave Semi, Arm, Cadence Design Systems, Keysight, Open Compute Project, Synopsys, Teradyne
2025’s Main Topics Included:
AI/ML Acceleration, Open Chiplet Economy, Advanced Packaging Methods, Die-to-die Interfaces, Working … Read More
Designing semiconductor chips has traditionally been costly and controlled by a few major Electronic Design Automation (EDA) vendors—Cadence, Synopsys, and Siemens EDA who dominate with proprietary tools protected by NDAs and restrictive licenses. Fabrication also requires expensive, often export-controlled equipment.… Read More
Probably one of the most anticipated semiconductor investor calls was held last week and it did not disappoint. It was Lip-Bu Tan’s first full quarter since he took over as CEO. In the resulting discussions on the SemiWiki Forum I am viewed as overly optimistic of Intel’s recent pivot. That is true, I am optimistic, but my observations… Read More
Cadence, a DAC 2025 industry sponsor, will exhibit in booth 1609 at the 62nd Design Automation Conference at San Francisco’s Moscone West Convention Center.
Highlights:
Paul Cunningham, SVP and GM of the System Verification Group, Cadence, will speak at Cooley’s DAC Troublemaker Panel. This discussion will be an open… Read More
Now that the dust has settled, I will give you my take on the Intel Foundry event. Some might call me a semiconductor event critic as I have attended hundreds of them over the last 40 years starting with the Design Automation Conference in 1984. Foundry events are my favorite because they really are the pulse of the semiconductor industry,… Read More
