As semiconductor designs continue to grow in complexity, FPGA prototyping has become an essential component of modern pre-silicon validation strategies. While FPGA capacity and gate-count equivalence often dominate discussions around prototyping platforms, the true value of an FPGA prototype lies elsewhere: its ability… Read More
Tag: bram
RDC – A Cousin To CDC
In a post-silicon bringup, it is customary to bring the design into a known state prior to applying further testing sequences. This is achieved through a Power-on-Reset (POR) or similar reset strategy which translates to initializing all the storage elements to a known state.
During design implementation, varying degrees of… Read More
