Accelerating the PCB Design-Analysis Optimization Loop

Accelerating the PCB Design-Analysis Optimization Loop
by Tom Dillinger on 08-01-2018 at 12:00 pm

With the increasing complexity and diversity of the mechanical constraints and electrical requirements in electronic product development, printed circuit board designers are faced with a number of difficult challenges:

  • generating accurate (S-parameter) simulation models for critical interface elements of the design
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PowerTree — a data repository and simulation platform for PCB power distribution networks

PowerTree — a data repository and simulation platform for PCB power distribution networks
by Tom Dillinger on 02-24-2017 at 12:00 pm

The difficulty of managing the power domains on a complex SoC led to the development of a power format file description, to serve as the repository for data needed for functional and electrical analysis (e.g., CPF, UPF). Yet, what about complex printed circuit boards? How can the power domain information be effectively represented… Read More