The design of an SRAM array requires focus on the key characteristics of readability, writeability, and read stability. As technology scaling has enabled the integration of large (cache) arrays on die, the sheer number of bitcells has necessitated a verification methodology that focuses on “statistical high-sigma” variation… Read More
Last year at #51DAC we gave away more than a thousand printed versions of our book “Fabless: The Transformation of the Semiconductor industry.” This year we gave away pens with a light and stylus. My friends at Solido Design gave away 600 pens in their booth and we gave away another 400 at our DAC reception on Wednesday night. Solido… Read More
Back in the day, EDA companies enabled the foundries. Seriously, those pesky little foundries chased us EDA companies around like puppies who needed a walk. Now, emerging EDA and IP companies are the puppies and we chase the foundries. Solido Design Automation is one of the hardest working puppies that I have ever helped with strategic… Read More
