Formal Verification of Registers and SoC Assembly in Collaboration with Jasper™ and OneSpin™

Formal Verification of Registers and SoC Assembly in Collaboration with Jasper™ and OneSpin™
by Admin on 04-28-2022 at 12:00 am

Description
Automatic generation of System Verilog Assertions for block level register specification, chip-level RTL design aggregating leaf level design, and RTL wrapper connectivity checks at SoC level.

Apr 28, 2022 10:00 AM in Pacific Time (US and Canada)

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ISO 26262: Feeling Safe in Your Self-Driving Car

ISO 26262: Feeling Safe in Your Self-Driving Car
by Daniel Nenni on 04-11-2022 at 10:00 am

ISO 26262

The word “safety” can mean a lot of different things to different people, but it’s a word we hear frequently when the topic involves automobiles. In contrast, “functional safety” has a long-established meaning in the design of electrical and mechanical systems: an automatic protection mechanism with a predictable response … Read More


DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development

DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development
by Daniel Payne on 01-11-2022 at 10:00 am

IDesignSpec min 1

Walking the exhibit floors at DAC in December I spotted the familiar face of Anupam  Bakshi, Founder and CEO of Agnisys, so I stopped by the booth to get an update on his EDA company. My first question for him was about the origin of the company name, Agnisys, and I found at that Agni means Fire in Sanskrit, one of the five elements.

The … Read More


AI for EDA for AI

AI for EDA for AI
by Daniel Nenni on 12-24-2021 at 6:00 am

Agnisys AI EDA AI

I’ve been noticing over the last few years that electronic design automation (EDA) vendors just love to talk about artificial intelligence (AI) and machine learning (ML), sometimes with deep learning (DL) and neural networks tossed in as well. It can get a bit confusing since these terms are used in two distinct contexts. The first… Read More


What the Heck is Collaborative Specification?

What the Heck is Collaborative Specification?
by Daniel Nenni on 10-04-2021 at 6:00 am

Git Commit

It’s been quite a while since I talked with Agnisys CEO and founder Anupam Bakshi, when he described their successful first user group meeting. I reached out to him recently to ask what’s new at Agnisys, and his answer was “collaborative specification.” I told him that I wasn’t quite sure what that term meant, and he offered to spend… Read More


AUGER, the First User Group Meeting for Agnisys

AUGER, the First User Group Meeting for Agnisys
by Daniel Nenni on 04-01-2021 at 10:00 am

website banner with date 1

As a long-time member of the EDA community, I really believe in user groups. EDA tools are complicated beasts, with many options and different ways to use them, and they are constantly evolving. Users interact with their local field applications engineers (FAEs) and sometimes corporate AEs (product specialists) as well on a regular… Read More


AUGER 2021 – Agnisys User Group Educational Roundtable

AUGER 2021 – Agnisys User Group Educational Roundtable
by Admin on 03-18-2021 at 12:00 am

Despite the many challenges we’re all facing, 2020 was a year of growth for Agnisys. We have expanded our user base, introduced new products, and developed unified flows and methodologies to help our users be even more successful. We’re excited to take the next step in our evolution by scheduling our first user group event.

We’ve

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Register Automation for a DDR PHY Design

Register Automation for a DDR PHY Design
by Daniel Nenni on 01-27-2021 at 10:00 am

Six Semi Graphic

Several months ago, I interviewed Anupam Bakshi, the CEO and founder of Agnisys. I wanted to learn more about the company, so I listened to a webinar that covered their latest products and how they fit together into an automated flow. I posted my thoughts and then I became curious about their customers, so I asked Anupam to arrange … Read More


Automatic Generation of SoC Verification Testbench and Tests

Automatic Generation of SoC Verification Testbench and Tests
by Daniel Nenni on 12-23-2020 at 6:00 am

Agnisys QEMU

Last month, I blogged about a webinar on embedded systems development presented by Agnisys CEO and founder Anupam Bakshi. I liked the way that he linked their various tools into a common flow that spans hardware, software, design, verification, validation, and documentation. Initially I was rather focused on the design aspects… Read More


Embedded Systems Development Flow

Embedded Systems Development Flow
by Daniel Nenni on 11-09-2020 at 6:00 am

Webinar SoC 1

Earlier this year. as part of my coverage of the virtual Design Automation Conference (DAC), I interviewed Agnisys CEO and founder Anupam Bakshi. He talked about the new products they introduced at the show and filled me in on the history of the company and his own background. Recently, Anupam presented the webinar “System Development… Read More