Synopsys’ New Die-to-Die PHY IP – What It Means

Synopsys’ New Die-to-Die PHY IP – What It Means
by Randy Smith on 10-29-2019 at 10:00 am

This morning, Synopsys announced its new Die-to-Die PHY IP. This announcement is critically important as it addresses two major market drivers – the growing need for faster connectivity in the datacenter and similar markets, and a path to better exploit the latest processes by dealing with yield issues for larger dies in a different… Read More


eSilicon Bucking the Trend at OFC with 7nm SerDes

eSilicon Bucking the Trend at OFC with 7nm SerDes
by Daniel Nenni on 03-11-2019 at 8:00 am

A recent press release from eSilicon caught my eye. The company has been touting their 7nm SerDes quite a bit lately – reach, power, flexibility, things like that. While those capabilities are important, any high-performance chip needs to work in the context of the system, which usually contains technology from multiple sources.… Read More


Measuring Up 7nm IP

Measuring Up 7nm IP
by Daniel Nenni on 08-17-2018 at 12:00 pm

The Linley Group is an industry-leading source for independent technology analysis of semiconductors for networking, communications, mobile, and data-center applications. Their Microprocessor Report is widely read as a source of un-biased, no-nonsense analysis of technologies and trends. So, when they dig into something… Read More


7nm SERDES Design and Qualification Challenges!

7nm SERDES Design and Qualification Challenges!
by Daniel Nenni on 11-22-2017 at 7:00 am

Semiconductor IP is the fastest growing market inside the fabless ecosystem, it always has been and always will be, especially now that non-traditional chip companies are quickly entering the mix. Towards the end of the year I always talk to the ecosystem to see what next year has in store for us and 2018 looks to be another year of … Read More