I used to be part of the custom silicon management team at Apple. I’ve seen how great a challenge it is to pull off a custom silicon strategy within a one year product cycle. Apple is the perfect example of this custom silicon model since they develop the best mobile processors in the world for their products. Which also includes other supporting system custom silicon.
Recently, Apple has even dropped Intel in favor of their own M1 processor for the Mac. Tesla has made their own AI processor and dropped Nvidia. Amazon AWS is about to release their own AI chip Trainium. Google is rumored to be developing custom silicon for their next phone release. Many others, such as Facebook, are also known to be or rumored to be developing custom silicon as part of their products or services. These are the who’s who best companies in the world developing custom silicon to lead their categories, and saying NO to off-the-shelf silicon.
There are some basic steps that should always be taken to start on the path towards a successful custom silicon strategy. Here they are:
1. Decide where to integrate each type of circuit.
By ‘where’ I mean multiple things. First, I mean what semiconductor process node. One common approach is to split chip integration into one chip for analog and power circuits in a 5V process. Then have a second digital chip in a low voltage process. There are processes that in some cases can be a good performance and value compromise to integrate everything into one chip (such as some 65 to 55 nm BCD lite nodes).
Second, there is the system physical location that needs to be considered. The charger chip will want to be close to the battery and the power input. The processor will want to be close to its peripherals. Trade-offs will need to be worked out to see if integration is acceptable or not.
Third, there is routability to be considered to check that routing congestion is not an issue including all the necessary passives required for the chip(s).
Fourth, there are some types of components such as sensors that are made in very specialized technologies such as MEMS, and these are not suitable for integration into a custom chip in standard silicon processes. You may be able to get benefits with the chip co-packaging approach here.
2. Decide what makes sense to integrate and what doesn’t.
Semiconductor processes don’t provide good enough cost and density to justify swapping an off-the-shelf power cap or power inductor for an integrated version. You can easily absorb into a custom silicon chip ESD protection and other diodes, signal fets and power fets. But for the latter you need to keep in mind that some power fet technologies are superior for high power and high voltage applications and best kept as off-the-shelf components. Every design is different and requires some engineering analysis to decide what makes sense.
Most off-the-shelf components can be integrated into one or a few chips. This will provide you a BOM cost reduction and board size reduction typically in the 50% range for each. Also better reliability, better anti-counterfeit security, better fit to your PRD and more.
3. Determine what are suitable existing components that could be used as the base IP to get to your desired custom chip.
Custom silicon is usually developed in parallel to the system development, as time to market is usually key for high volume consumer electronics. Therefore, it is desirable to find chips that are available off-the-shelf and try to base your custom chip project using those as base IP. Once you have a list of off-the-shelf components that look attractive, you can contact the suppliers that make them to start a discussion about custom silicon.
4. Determine who are suitable suppliers for your project and how you will manage the project.
First, decide how comfortable you feel about the suppliers you have listed in step 3. Do they have redundant manufacturing sites? Do they have a good track record delivering shipments on time? What is their overall financial health?
Second, you need to know how to manage the silicon suppliers from concept to mass production. It’s too risky to simply sign off on a chip spec, and then wait 4,5,6+… months to get your chips back. You need to mitigate that risk with a very thorough process that will ensure continuous communication and alignment between all parties involved, implement frequent checkpoints with chip experts that work for your company reviewing your supplier’s work to ensure it’s of high quality. It’s not an acceptable mitigation to split your man power by having a ‘backup’ system designed with off-the-shelf components.
5. Determine what is your ROI for your particular situation.
Let’s explore an example: Acme electronics is shipping on average 6 million units per year. The product life is about 4 years. Their electronics BOM cost is $2. They’ve determined that with one custom silicon chip they can do everything they need for $1. They engage with a supplier that quotes them an NRE of $3 Million USD in three payments: $1 Million USD at kick off, $1.5 Million USD at tape out and $0.5 Million USD at mass production ramp. So Acme electronics needs to pay up front $3 Million USD. But they will save $1 in every unit they ship. After shipping 3 Million systems they will recover their NRE investment. After that they will earn $1 of extra profit for every system they ship. Since they will sell 24 million systems during the product’s lifetime, after deducting the $3 Million USD NRE, Acme electronics makes $21 Million USD of extra profit. So the ROI for them was equal to 21 Million USD/3 Million USD = 700%.
It’s also important to consider in this analysis the losses you may be incurring due to counterfeits, yield losses, etc… A custom silicon strategy can help you virtually eliminate counterfeit risks and losses. Therefore, that should be part of your cost benefit analysis.
About CustomSilicon.com by Digital Papaya Inc.
CustomSilicon.com is the leading consulting firm in the custom silicon strategy and project management space for AR/VR, automotive, mobile, server, crypto, sensors, security, medical, space and more.
Raul has 20 years of combined experience in the system electronics and silicon industries. He is currently responsible for major system company’s custom silicon and sensor projects. Raul was the directly responsible silicon manager for 18 chips ramped to mass production at Apple for iPhone and iPad, and 23 total chips ramped to mass production counting projects where he was an expert reviewer. Raul was directly responsible for the development of mobile processor System PMICs for the iPad2, New iPad, iPad mini, iPad 4 and iPhone 5s. Other silicon included, backlight/display power for iPhone 5 and iPhone 5s, lightning connector silicon and video buffers. He managed supplier teams across the Globe.
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