At the OCP APAC Summit in Taiwan, August 11–12, 2026, Applied Materials’ Subi Kengeri framed artificial intelligence as the semiconductor industry’s largest inflection point. AI demand is accelerating the industry toward one trillion dollars in annual revenue, but the keynote’s central message was more consequential than… Read More
Podcast EP360: IDA Ireland’s Role to Expand Ireland’s Footprint Across the Semiconductor Ecosystem with Anne-Marie Tierney
Daniel is joined by Anne-Marie Tierney, Divisional Manager at IDA Ireland. Anne-Marie has 24 years’ experience in the global investment environment with IDA Ireland, working across several key roles in Ireland and abroad, positioning Ireland for high impact investments, with a specific interest in semiconductors. Prior … Read More
A 0.42-Nanometer Breakthrough From TSMC Could Push Transistors Beyond Silicon
Researchers at National Yang Ming Chiao Tung University and TSMC Corporate Research engineered a 0.42-nanometer aluminum-oxide interface that protects electron transport in monolayer MoS₂ transistors while enabling strong gate control.
Silicon transistors are approaching physical limits that make each new generation… Read More
Micron Advanced Memory Portfolio Positioned for AI Infrastructure Expansion
Micron Technology has emerged as a critical supplier in the AI compute ecosystem, leveraging its leadership in advanced DRAM, High Bandwidth Memory (HBM), and NAND flash technologies to address rapidly growing demand from hyperscale data centers and AI accelerator platforms. The company’s strategic focus on leading-edge… Read More
Comparing Intel EMIB and Intel Foveros
Intel EMIB and Intel Foveros are advanced semiconductor-packaging technologies designed to combine multiple silicon dies, or chiplets, within one processor package. Both support heterogeneous integration: manufacturers can build different functions using the process technology best suited to each one, then connect … Read More
Intel and TSMC Take Different Paths to High-NA EUV
Intel and TSMC are pursuing the same objective—manufacturing smaller, faster, and more energy-efficient semiconductors—but they have adopted different strategies for advanced lithography. Intel moved early to develop High-Numerical-Aperture Extreme Ultraviolet lithography, commonly called High-NA EUV, while TSMC… Read More
Intel Foundry and the DAC2026 Ecosystem
The Design Automation Conference in Long Beach was a pleasant surprise. It drew strong attendance from leading companies across the semiconductor ecosystem, along with an impressive number of newcomers. AI-focused EDA companies came out in force—and delivered.
Intel Foundry also made its presence felt, reminding everyone… Read More
Executive Interview with James Huang of AlChip
I had a chance sit down with James Huang, Director of Engineering at Alchip Technologies, to discuss the company’s recent multi-die packaging achievements and learn about Alchip’s next steps in pushing the boundaries of innovation for next generation AI ASIC.
James is acknowledged as a leading light in advanced node ASICs, based… Read More
Podcast EP358: How Custom Silicon Development Allowed Cisco to Fuel New Innovation for Its Customers
Daniel is joined by Nick Kucharewski Senior Vice President and General Manager for Cisco’s silicon development organization. In this role he is responsible for the end-to-end strategy, cross-functional execution, organization alignment, and product roadmap for Silicon One, Cisco’s uniquely scalable and programmable … Read More
The Difference Between TSMC CoWoS-S and CoWoS-R
CoWoS-S and CoWoS-R are two versions of TSMC’s Chip-on-Wafer-on-Substrate advanced packaging platform. Both technologies are designed to combine high-performance processors, chiplets and high-bandwidth memory, or HBM, within a single package. This shortens the electrical connections between computing and memory components,… Read More


Comparing Advanced Packaging from TSMC, Intel Foundry, and Samsung Foundry