At the 2026 OIP Ecosystem Forum, the industry narrative shifted from incremental scaling to what TSMC defines as the “Intelligence Revolution.” Akin to the 18th-century Industrial Revolution which transitioned human physical labor to mechanical power, the current era is augmenting human ingenuity through … Read More
Podcast EP368: An Overview of TSMC Open Innovation Platform (OIP) event with Aveek Sarkar
Daniel is joined by Aveek Sarkar, who heads TSMC’s Ecosystem and Alliance Management Division. Along with his team, he is responsible for driving semiconductor design enablement in collaboration with the partner ecosystem through TSMC’s Open Innovation Platform® (OIP). Prior to TSMC, Aveek worked on chip designs at Sun Microsystems… Read More
Silicon Valley, à la Française – One Year On
One Year Later — September 2026
When this piece first ran a year ago, VSORA was the quiet outsider, a company with a bold architecture and no Silicon Valley address. One year on, the thesis has held up better than even its author expected. In January 2026, Sandra Rivera, former CEO of Altera and, before that, a two-decade Intel veteran… Read More
The State of the U.S. Semiconductor Manufacturing Workforce 2026 Benchmark Report
America’s semiconductor workforce is entering a decisive growth period, but employment capacity is not yet keeping pace with investment. New fabrication plants, packaging facilities, and supplier expansions are creating demand for thousands of engineers, technicians, operators, and skilled tradespeople. Whether the… Read More
Comparison of TSMC CoWoS-S, CoWoS-R, and CoWoS-L
Chip-on-Wafer-on-Substrate, commonly called CoWoS, is an advanced packaging platform developed by TSMC. It allows processors, chiplets, and high-bandwidth memory stacks to be integrated within a single package. CoWoS has become especially important for artificial-intelligence accelerators and high-performance computing… Read More
The Technical Problem Is Often Not the Business Problem
By Prof. Dr. S. Filo Ambrosini
On a semiconductor line, a rising defect rate can trigger a familiar debate. Do we need a new inspection system? More sensors? An additional engineer?
Those may all be valid responses. But before making the decision, someone needs to establish when the change began, where it first appears, and whether… Read More
Broadcom’s AI Engine Shifts Into Overdrive
Broadcom’s fiscal third-quarter 2026 results show how artificial-intelligence infrastructure is shifting from general-purpose acceleration toward customized compute and large-scale networking. The company reported AI semiconductor revenue of $16.7 billion, up 221% year over year and 54% sequentially. That expansion… Read More
TSMC’s CoWoS Capacity to Double by 2028—and Rivals Will Still Win Orders
TSMC reportedly plans to double its Chip-on-Wafer-on-Substrate capacity from approximately 130,000 300mm-equivalent wafers per month at the end of 2026 to 260,000 by 2028. The estimate is not formal company guidance and should be treated as a supply-chain projection. Nevertheless, the direction is consistent with TSMC’s… Read More
ASML Has High-NA and Chipmakers Can’t Say No
ASML’s grip on the most advanced corner of chip manufacturing is tightening. The Dutch company, already the sole supplier of extreme ultraviolet lithography systems, is winning broader industry support for High Numerical Aperture EUV, or High NA, its next-generation technology for printing smaller and denser circuitry.… Read More
Rethinking AI Chips: How VSORA Redesigned the Hardware That Runs AI
Instead of tweaking existing designs, VSORA built an AI chip from scratch to fix the real bottleneck: moving data fast enough to keep the math circuits busy.
There’s a version of the AI hardware story that everyone in the chip industry has heard a hundred times. A startup raises money on a clever chip design, promises to topple… Read More


The Invisible Bottleneck Is Costing You Time You Can’t Get Back