Dan is joined by Dr. Walden Rhines. Wally is a lot of things, CEO of Cornami, board member, advisor to many and friend to all. For this discussion he is the Executive Sponsor of the SEMI Electronic Design Market Data report.
Dan explores the Q2 results summarized in the report with Wally. Overall growth was around 5%, a much lower number… Read More
Electrical copper interconnects, once the backbone of data center networks, are facing growing challenges. Rapid expansion of AI and ML applications is driving a significant increase in cluster sizes within data centers, resulting in substantial demands for faster I/O capabilities. While the surge in I/O requirements is … Read More
Dan is joined by Anand Thiruvengadam, director of product and business management and head of the Solutions and Go-to-Market functions for the memory market segment at Synopsys.
Anand discusses the substantial demands experienced by memory designers due to trends such as big data analytics. He describes how these demands impact… Read More
- ASML reports in-line QTR but future looks flat for 2024
- Downcycle finally hits litho leader- ASML monopoly solid as ever
- Memory remains bleak – New China sanctions unclear
- Recovery timing is unclear but planning for an up 2025
In Line Quarter and year as expected
Overall revenues came in at Euro6.7B with EPS at Euro4.81, more… Read More
Pat Brockett is a veteran of the global semiconductor industry. He began his career in sales and marketing at Texas Instruments. After that, he was senior vice president of worldwide sales and marketing at National Semiconductor. Subsequently, he headed the analog division and is credited with turning it around.
Later, he was… Read More
If you have anything to do with the semiconductor industry, you already know that one of the hottest areas for both manufacturing and EDA are systems designed with advanced packaging, basically putting more than one die (aka chiplets) in the same package.
When 3D packaging was first introduced, there were not really any effective… Read More
Anyone who has read my previous IEDM articles will know I view it as one of the best conferences on semiconductor process technology. From the tutorials, short courses and the conference papers there are so many great opportunities to keep up to date on the latest developments. The following are the conference organizers’ announcements… Read More
Semiconductor IP design re-use has enabled the relentless growth in complexity of SoC and chiplet-based systems over the years, and with IP reuse comes many unique challenges. Fabless design companies use IP provided by a vibrant ecosystem of IP suppliers and foundries, plus internal re-use in the quest to get to market more … Read More
The 15th TSMC Open Innovation Platform® (OIP) event was held recently. This event is a focal point across the industry for cutting-edge development and industry-level collaboration. Appropriately, advanced packaging, paving the way for multi-die design was a focal point for the event. You can get a good overview of what was … Read More
A major challenge in the field of layout design lies in the post-layout parasitic extraction process, which often introduces delays and the potential for significant modifications in the layout. This paper introduces a novel approach to address this challenge, providing real-time parasitic estimations using Width Spacing… Read More
Bluetooth 6.0 Channel Sounding is Here