Dan is joined by Rimpy Chugh, a Principal Product Manager at Synopsys with 14 years of varied experience in EDA and functional verification. Prior to joining Synopsys, Rimpy held field applications and verification engineering positions at Mentor Graphics, Cadence and HCL Technologies.
Dan explores the expanding role of static… Read More
Ryan W. Parker is a seasoned executive and product leader at Phononic Inc., where he oversees high-tech product incubation and drives P&L strategy. With a robust background at Intel’s IoT Group, Ryan has successfully led multi-disciplinary teams transforming cutting-edge semiconductor and IoT technologies into scalable,
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Jon Kemp is President of the Electronics division for DuPont and Chief Executive Officer-Elect for Qnity, the planned independent Electronics Company, which will be an independent, publicly traded company spun off from DuPont’s (NYSE: DD) Electronics business upon completion of the intended separation on November 1, 2025.… Read More
Jay Vleeschhouwer, Managing Director of Software Research at Griffin Securities, is a noted financial analyst who does a yearly presentation on the State of EDA during the Design Automation Conference (DAC). This year was no exception. He and I spent a memorable afternoon discussing the Synopsys-Ansys merger and startups. … Read More
As hardware systems become increasingly complex and security threats grow more sophisticated, ensuring robust hardware security during the pre-silicon phase of development is more critical than ever. Cycuity’s white paper outlines how its Radix platform enables engineers to verify, visualize, and measure the effectiveness… Read More
3D IC was a very popular topic at DAC. The era of heterogeneous, multi-chip design is here. There were a lot of research results and practical examples presented. What stood out for me was a panel at the end of day two of DAC that was hosted by Siemens. This panel brought together an impressive group of experts to weigh in on what was really… Read More
With advanced semiconductor processes continuing to shrink, the number and complexity of parasitic elements in designs grows exponentially contributing to one of the most significant bottlenecks in the design flow. Undetected parasitic-induced issues can be extremely costly, often resulting in tape-out delays.
Silvaco… Read More
Given my SpyGlass background I always keep an eye out for new ideas that might be emerging in static and formal verification. Whatever can be covered through stimulus-free analysis reduces time that needn’t be wasted in dynamic analysis, also adding certainty to coverage across that range. Still, advances don’t come easily. … Read More
By Tetsu Ho
With the ever-increasing global demand for smarter, faster electronic systems, the semiconductor industry faces a dual challenge: delivering high-performance memory while reducing environmental impact. Winbond is meeting this challenge head-on by embedding sustainability into every layer of its operations—from… Read More
Alchip Technologies, a global leader in high-performance computing (HPC) and AI infrastructure ASICs, has officially launched its 2nm Design Platform, marking a major advancement in custom silicon design. The company has already received its first 2nm wafers and is collaborating with customers on the development of high-performance… Read More
Should Intel be Split in Half?