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Synopsys is Paving the Way for Success with 112G SerDes and Beyond

Synopsys is Paving the Way for Success with 112G SerDes and Beyond
by Mike Gianfagna on 05-08-2024 at 10:00 am

Synopsys is Paving the Way for Success with 112G SerDes and Beyond

Data communication speeds continue to grow. New encoding schemes, such as PAM-4 are helping achieve faster throughput. Compared to the traditional NRZ scheme, PAM4 can send twice the signal by using four levels vs. the two used in NRZ. The diagram at the top of this post shows the how data density is increased. With progress comes… Read More


Oops, we did it again! Memory Companies Investment Strategy

Oops, we did it again! Memory Companies Investment Strategy
by Claus Aasholm on 05-08-2024 at 8:00 am

Opps We Did it Again Semiconductor Memory 4

We are in the semiconductor market phase where everybody disagrees on what is going on. The market is up; the market is down. Mobile phones are up…. oh no, now they are down. The PC market is up—oh no, we need to wait until we can get an AI PC. The inflation is high—the consumer is not buying.

For us in the industry, the 13-week financial … Read More


An Enduring Growth Challenge for Formal Verification

An Enduring Growth Challenge for Formal Verification
by Bernard Murphy on 05-08-2024 at 6:00 am

Math blackboard min

A high-quality verification campaign including methods able to absolutely prove the correctness of critical design behaviors as a complement to mainstream dynamic verification? At first glance this should be a no-brainer. Formal verification offers that option and formal adoption has been growing steadily, now used in around… Read More


Rigid-flex PCB Design Challenges

Rigid-flex PCB Design Challenges
by Daniel Payne on 05-07-2024 at 10:00 am

PADS Professional Design

From Zion Research I learned that the flexible electronics market was about $13.2B in 2021 and growing at a CAGR of 21%, so that was impressive. There are several factors that make rigid-flex circuit so attractive, like: space efficiency, reduced weight, enhanced reliability, improved signal integrity, streamlined assembly,… Read More


Accelerate SoC Design: DIY, FPGA Boards & Commercial Prototyping Solutions (I)

Accelerate SoC Design: DIY, FPGA Boards & Commercial Prototyping Solutions (I)
by Daniel Nenni on 05-07-2024 at 6:00 am

Logic System

In the early days, chip designers had to rely on time-consuming simulation results or wait for the engineering sample to validate whether the design meets its intended objectives. With the increasing complexity of SoC designs, the need to accelerate software development has also risen to ensure a timely entry to market.

In the… Read More


The latest ideas on time-sensitive networking for aerospace

The latest ideas on time-sensitive networking for aerospace
by Don Dingee on 05-06-2024 at 10:00 am

Aircraft domain requirements for time sensitive networking in aerospace

Time-sensitive networking for aerospace and defense applications is receiving new attention as a new crop of standards and profiles approaches formal release, anticipated before the end of 2024. CAST, partnering with Fraunhofer IPMS, has developed a suite of configurable IP for time-sensitive networking (TSN) applications,… Read More


Analog Bits Continues to Dominate Mixed Signal IP at the TSMC Technology Symposium

Analog Bits Continues to Dominate Mixed Signal IP at the TSMC Technology Symposium
by Mike Gianfagna on 05-06-2024 at 6:00 am

Analog Bits Continues to Dominate Mixed Signal IP at the TSMC Technology Symposium

The recent TSMC Technology Symposium in the Bay Area showcased the company’s leadership in areas such as solution platforms, advanced and specialty technologies, 3D enablement and manufacturing excellence. As always, the TSMC ecosystem was an important part of the story as well and that topic is the subject of this post. Analog… Read More


Why NA is Not Relevant to Resolution in EUV Lithography

Why NA is Not Relevant to Resolution in EUV Lithography
by Fred Chen on 05-05-2024 at 8:00 am

Why NA is Not Relevant to Resolution in EUV Lithography

The latest significant development in EUV lithography technology is the arrival of High-NA systems. Theoretically, by increasing the numerical aperture, or NA, from 0.33 to 0.55, the absolute minimum half-pitch is reduced by 40%, from 10 nm to 6 nm. However, for EUV systems, we need to recognize that the EUV light (consisting … Read More


Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya

Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya
by Daniel Nenni on 05-03-2024 at 10:00 am

Dan is joined by Mayukh Bhattacharya, Engineering, Executive Director, at Synopsys. Mayukh has been with Synopsys since 2003. For the first 14 years, he made many technical contributions to PrimeSim XA. Currently, he leads R&D teams for PrimeSim Design Robustness and PrimeSim Custom Fault products. He was one of the early… Read More


CEO Interview: Harish Mandadi of AiFA Labs

CEO Interview: Harish Mandadi of AiFA Labs
by Daniel Nenni on 05-03-2024 at 6:00 am

image2

Harish Mandadi is the CEO and Founder of AiFA Labs, a service-based IT company that provides best-in-class solutions for clients across various industries. With over 20 years of experience in IT sales and delivery, I have a unique blend of entrepreneurial vision and hands-on expertise in the dynamic landscape of technology.… Read More