At advanced nodes such as 7 and 5nm, timing closure and sign off are becoming much more difficult than before at 16nm. One area of chips that has increased in complexity dramatically and who’s correct operation is essential for silicon success is the clock tree. If the clock tree has excessive jitter, it will throw off every timing… Read More
WEBINAR: Revolutionizing Electrical Verification in IC DesignIn the complex world of IC design, electrical…Read More
Silicon Catalyst on the Road to $1 Trillion IndustryThere were quite a few announcements at the…Read More
Hierarchically defining bump and pin regions overcomes 3D IC complexityBy Todd Burkholder and Per Viklund, Siemens EDA…Read More
CDC Verification for Safety-Critical Designs – What You Need to KnowVerification is always a top priority for any…Read More
Ceva Unleashes Wi-Fi 7 Pulse: Awakening Instant AI Brains in IoT and Physical RobotsIn the rapidly evolving landscape of connected devices,…Read MoreSondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target
Designing an ASIC is little bit like trying to hit the bullseye, in the dark. I’ve spent several decades in the ASIC business I can tell you this is what it’s like from first-hand experience. When the design team sets out to build a custom chip to make their product better, faster, more robust, etc. (pick the words you like), there is … Read More
Package Pin-less PLLs Benefit Overall Chip PPA
SOCs designed on advanced FinFET nodes like 7, 5 and 3nm call for silicon-validated physical analog IP for many critical functions. Analog blocks have always been node and process specific and their development has always been a challenge for SOC teams. Fortunately, there are well established and endorsed analog IP companies… Read More
Semiconductor Growth to Continue in 2022
The semiconductor market showed powerful growth in 2Q 2021, up 8.3% from 1Q 2021 and up 29% from a year earlier, according to WSTS. Most major semiconductor companies experienced substantial revenue growth in the quarter. The memory companies were especially strong, with 2Q 2021 versus 1Q 2021 revenue (in local currency) up 19.6%… Read More
TSMC Wafer Wars! Intel versus Apple!
The big fake news last week came from a report out of China stating that TSMC won a big Intel order for 3nm wafers. We have been talking about this for some time on SemiWiki so this is nothing new. Unfortunately, the article mentioned wafer and delivery date estimates that are unconfirmed and from what I know, completely out of line. … Read More
Controlling the Automotive Network – CAN and TSN Update
Cars are hotbeds of systems innovation. I’ve been fortunate to be asked to write about many of these areas, from the MEMS underlying sensors to ISPs and radars, intelligent imaging and sensor fusion. And many aspects of design for safety within the SoCs around a car. But I haven’t written much about the networks connecting these … Read More
Flex Logix and Socionext are Revolutionizing 5G Platform Design
The world is buzzing with 5G deployment news. It seems the entire planet anxiously awaits the step function improvement in bandwidth and latency promised by this new technology. When there is additional deployment, it’s news. When there are new chipsets and devices supporting the standard it’s news. But when there is a fundamental… Read More
How Hyperscalers Are Changing the Ethernet Landscape
It’s all about bandwidth these days – fueling hyperscale data centers that support high-performance and cloud computing applications. It’s what enables you to stream a movie on your smart TV while your roommate plays an online game with friends located in different parts of the country. It’s what makes big data analytics run swiftly… Read More
You Get What You Measure – How to Design Impossible SoCs with Perforce
We all know that a trusted, reliable, and well-integrated design flow is critical to successful advanced SoC design. So is proven, robust IP. While these elements are necessary for success, they are not, by themselves, sufficient. There are other aspects to consider – measurement, tracking and coordination. We’ve all heard … Read More
S2C FPGA Prototyping solutions help accelerate 3D visual AI chip
3D vision technology is rapidly evolving. Compared to 2D vision technology that deals with planar information, 3D vision works with physical information, including depth, which makes it possible to recognize and measure objects with curved surfaces and arcs. In addition, as deep machine learning and big data computing technologies… Read More


An Insight into Building Quantum Computers