Power-SOI technology is rapidly emerging as a foundational platform for next-generation functional safety integrated circuits used in autonomous vehicles, industrial automation, humanoid robotics, and other mission-critical systems. The growing convergence of high-voltage power management and low-voltage digital… Read More
If You Struggle with Up-To-Date Documentation llmda.ai Can HelpAccurate, complete, and consistent technical documentation is a…Read More
Siemens EDA Expands AI and Advanced Packaging Collaboration with TSMCAt the recent TSMC Technology Symposium 2026, Siemens…Read MoreCEO Interview with Vivek Raghunathan of Xscape Photonics
Vivek Raghunathan has over 18 years of experience in silicon photonics. He was a Sr. Principal Engineer, Product Architect and Program Leader for Integrated Silicon Photonics at Broadcom driving key core technology development required to co-package optics with switches and demonstrated industry’s first 25.6T Ethernet … Read More
CEO Interview with Baratunde Cola of Carbice
Baratunde Cola is the CEO and founder of Carbice, an Atlanta, Georgia-based company that develops scalable interface solutions to protect semiconductors and electrical components from overheating in any physical environment. He received his bachelor’s and master’s degrees from Vanderbilt University and … Read More
Podcast EP347: Agentic Workflows from Caspia Technologies for Advanced Chip Security Verification with Stuart Audley
Daniel is joined by Stuart Audley, vice president and general manager of product management at Caspia Technologies, where he focuses on agentic security workflows. He has decades of experience designing and deploying cryptographic hardware and security IP for top defense and leading semiconductor companies. He previously… Read More
ASML High-NA EUV is Not Ready for High-Volume Production
Contrary to the popular press, ASML High-NA EUV is not ready for logic production yet—and it may never be, at least not in the form originally envisioned. If you remember how long it took conventional EUV to become production-worthy—arguably 5–10 years—this should not come as a surprise. More importantly, this is no longer just… Read More
What Winemakers and Chip Designers Have in Common
Consider this a standout presentation at the Silicon Catalyst Spring Portfolio Update Meeting held yesterday at the Computer History Museum. Mahesh Tirupattur, CEO of Analog Bits, is a modern-day, multidimensional semiconductor hero and one of my trusted few. Analog Bits is a premier member of the semiconductor ecosystem,… Read More
Semiconductors Historic Start to 2026
The global semiconductor market grew 25% in the 1st quarter of 2026 from the 4th quarter of 2025 to reach $299 billion, according to WSTS. The 1st quarter of 2026 was up 79% from a year earlier. The 25% quarter-to-quarter growth was the highest in the over 40-year history of WSTS data, surpassing the 20% growth in the 2nd quarter of 2009.… Read More
If You Struggle with Up-To-Date Documentation llmda.ai Can Help
Accurate, complete, and consistent technical documentation is a critical element of success for any embedded system design project. This includes IP, SoCs, and the associated hardware and software infrastructure. When documentation contains errors, the consequences go beyond engineering inefficiency. Errors that drive… Read More
Bronco AI Webinar: Full-Chip SoC Debug in 15 Minutes
A single bug on a full-chip SoC can pull engineers off roadmap work for days or even weeks. It involves massive waveforms, thousands of files of RTL and UVM, and dense specs that aren’t always perfect. Finding these bugs have always been a matter of engineer-hours and how well knowledge diffuses through the organization.
Bronco … Read More
Europe is Getting Serious About ASIC Innovation
I was born in the UK (then still a part of Europe), so always eager to see them succeed. But I must admit that past behavior has reinforced the view that the EU’s only active “contribution” to progress is regulation. However this seems to be changing in multiple interesting ways. On a grand scale, the Nordic economic model is taking … Read More




ASML High-NA EUV is Not Ready for High-Volume Production