For decades now I’ve watched the incredible growth of SoCs in terms of die size, transistor count, frequency and complexity. Instead of placing all of the system complexity into a single, monolithic chip, there are now compelling reasons to use a multi-chip approach, like when the maximum die size limit is reached, or it’s… Read More




WEBINAR: FinFET UltraPcell Methodology
The custom physical implementation of circuit designs is a critical component of the integrated circuit (IC) process. Unfortunately, this step has been known to be one of the most time-consuming and prone to human error. Therefore, the need for a methodology that allows for faster, more accurate, and less error-prone work is … Read More
IP Lifecycle Management for Chiplet-Based SoCs
Chiplet-based System-on-Chips (SoCs) are becoming increasingly popular in the semiconductor industry due to their potential to improve design efficiency, increase performance, and reduce costs. While chiplets are seen as a way to reduce the cost of innovation, they introduce a lot of challenges too. Packaging, interconnect… Read More
CEO Interview: Issam Nofal of IROC Technologies
Issam Nofal is the CEO of IROC Technologies and has held various positions with the company for over 23 years as Product Manager, Project Leader, and R&D Engineer. He has authored several papers on test and reliability of Integrated Circuits. He holds a PhD in Microelectronics from Grenoble INP.
What is IROC Technologies’
… Read MoreDriving the Future of HPC Through 224G Ethernet IP
The need for speed is a never-ending story when it comes to data communications. Currently there are a number of trends such as cloud computing, artificial intelligence, Internet of Things (IoT), multimedia applications and consumer expectations driving this demand. All of these trends are accelerating the growth in high-performance-computing… Read More
A Negative Problem for Large Language Models
I recently read a thought-provoking article in Quanta titled Chatbots Don’t Know What Stuff Isn’t. The point of the article is that while large language models (LLMs) such as GPT, Bard and their brethren are impressively capable, they stumble on negation. An example offered in the article suggests that while a prompt, “Is it true… Read More
Why Generative AI for Chip Design is a Game Changer
AI-generated chip design is progressing at an incredible pace!
Earlier this week, I wrote about the Efabless AI Generated Open–Source Silicon Design Challenge. If you haven’t done so already, take a closer look at the challenge and see first-hand what this is all about. In talking to Mike Wishart and Mohamed Kassem, co-founders… Read More
AMAT- Trailing Edge & China Almost Offset Floundering Foundry & Missing Memory
-AMAT reported inline resulted helped by trailing edge & China
-Memory remains at very low levels- Foundry remains uninspiring
-China seems to be buying anything they are allowed to buy
-The recovery is too far out & unknown to handicap
Quarter was OK and Guidance also OK
Revenue was $6.63B and EPS of $1.86 versus reduced… Read More
An SDK for an Advanced AI Engine
I have observed before that the success of an AI engine at the edge rests heavily on the software interface to drive that technology. Networks trained in the cloud need considerable massaging to optimize for smaller and more specialized edge devices. Moreover, an AI task at the edge depends on a standalone pipeline demanding a mix… Read More
US giant swoops for British chipmaker months after Chinese sale blocked on national security grounds
According to UK based The Telegraph Pulsic is a chip maker and Cadence is a swooping US giant. I guess you have to stretch the truth to get those precious clicks these days. Even so this is a strategic acquisition for Cadence.
Pulsic is a 20+ year old EDA software company that offers chip planning and implementation software for custom… Read More
Rethinking Multipatterning for 2nm Node