Verification Engineer
Website Semidynamics
Description
We have multiple open positions in our verification team and we’re looking for individuals with either a strong Verification or strong microarchitecture background interested in working in the verification of a RISC-V design for an advanced technology node. Areas of focus are the vector instructions, the RISC-V base ISA, the RISC-V privileged ISA, cache coherency protocols, inter-processor communication protocols and full SoC verification.
Has ASML Reached the Great Wall of China