Sr. Manager, R&D

Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.

Job Overview

Part of the rapidly expanding Hardware-Analytics and Test (HAT) business unit, Sr Mgr,R&D.  This technical as well as management leadership position is responsible for HDG’s (Hardware Development Group) Analog/Mixed Signal Design abilities for Silicon Lifecycle management Ips. This includes designing blocks like bandgap, temperature sensor, Analog to Digital converters, Oscillators and many other mixed signal Ips from scratch in latest technology nodes. The person need to be a master of analog design with innovative mindset. Work will include architecture development, design, simulations and final ownership of silicon performance of the Ips in production.  In addition to this understanding of digital flow and post silicon test/characterization is a desirable skill.  Right candidate would have had good leadership experience and ability to manage a sizeable team towards its mission.  Very strong people leadership with key drive.

Also the leader will have a team responsible for the overall research and development of the IPs . Ensure productivity and efficiency of each team member ensuring career growth.

Responsibilities and Duties

• Responsible for Analog design for MSIPs from architecture to production silicon
• Will set up and manage the team of Analog/Mixed Signal design experts
• Work out innovative design techniques to overcome challenges
• Team designs of bandgap, temperature sensors, Signa Delta ADCs , DAC,  Voltage monitoring Ips, PLL
• Ensure right talent is identifies , managed , groomed and enable a stellar team performance
• Works together with global cross functional team for team’s success

Qualifications

• BS or MS degree in Electrical Engineering/Computer Science/Computer Engineering.
• 12 to 20 years of experience in the fields of Analog/Mixed Signal design for leading edge technologies
• Innovation mindset with system modelling, architecture and best design practices
• Ability to lead a large team that will cover different R&D project for AMS IP development .
• Strong knowledge about custom SOC flow desirable.
• Understanding of Analog, digital flow and post silicon test/characterization is a desirable skill
• High in drive and bringing positive energy leading towards a mission
• Strong personal value system

Preferred Skills

• High drive and people leadership skill
• Demonstrated experience with Analog/Mixed Signal Design and IP/Product ownership with Analog and Digital subsystems
• Thorough knowledge of AMS design flow with digital top SOC integration methodology
• Closely work with Analog Design and layout team by reviewing and guiding for best-in-class performance
• People management expertise, ability to bring good people and lead them from front

Location:  To be hired for Bhubaneswar