Solution Architecture Division – CPU Solutions and Debug Manager

Responsibilities

1. Act as a trusted CPU hardware consultant to customers

2. Offer appealing solutions to customers

3. Give Andes processor training courses to customers

4. Resolve customers’ technical issues

5. Power user of Andes processor and SoC platform IP products

6. Enhance Verilog simulation, logic synthesis, and FPGA prototype flows in product packages

7. Write technical tutorials

8. Generate PPA (Power, Performance, and Area) on 7 ~ 130 nm process nodes

9. Improve product feature offerings by providing customer feedback to internal cross-functional teams.

Minimum qualifications:

1. Master’s degree in Computer Engineering, Computer Science, Electrical Engineering or equivalent practical experience

2. Experience working with Verilog or SystemVerilog.

Preferred qualifications:

Excellent analytical skills and creative problem-solving