Software Engineer – Circuit Simulation (EMIR Analysis)
Website Cadence
Circuit simulation developer with an emphasis on EMIR analysis
The Circuit Simulation Developer is responsible for designing, implementing and maintaining software designed to perform transistor-level VLSI circuit simulation, with an emphasis on EMIR analysis. The ideal candidate would have expertise in device modeling and numerical techniques for VLSI circuit simulation. Understanding or experience of parasitic extraction is a strong plus. Candidate should have an advanced degree in electrical engineering, computer science, applied mathematics, or similar. Candidates with experience in related fields will be considered, particularly:
- Transistor-level SPICE analysis algorithms
- Parasitic linear network reduction and analysis algorithms
- Statistical analysis, EMIR analysis, electro-thermal analysis algorithms
- Device physics, compact device modeling, behavioral modeling, macro modelling, statistical modeling, reliability modeling
- Numerical analysis, especially numerical linear algebra, sparse matrix techniques, or numerical methods for solution of ordinary and partial differential equations
- High performance computing / large scale scientific computing and deployment of parallel numerical algorithms
Candidate should be proficient in C/C++ development. Experience with scripting languages like Python and GUI frame works like QT is a plus. Knowledge or Demonstrated software engineering skills, with a good understanding of efficient implementation of high-performance numerical algorithms and associated data structure design, and experience in relevant software frameworks is a plus. Exposure to high-performance numerical computing, CPU/GPU systems. The candidate should have ability to work with an engineering and cross-functional team to deliver innovative technologies in a production environment.
TSMC 16th OIP Ecosystem Forum First Thoughts