Cadence is the leader in hardware emulation-acceleration technologies and products. Our emulation-acceleration system platform is the most advanced industry-leading configurable scalable system, generation after generation, used in labs and datacenters.
As an Architect, you will help define and develop advanced prototyping flows and methodologies for Protium FPGA prototyping platform. You will be working with key customers on complex problems in areas of FPGA Based emulation/prototyping with concentration in driving SW design and development to improve overall TAT, performance and efficiency in debug. This will require independent judgment in developing methods, techniques, and evaluation criterion for obtaining results. Additionally, you will provide mentorship to other engineers, working closely with technical team to enable high quality solutions to market
- The candidate should have MS in Computer Engineering/Electrical Engineering
- At least 10 years of prior similar experience is required
- Experience in a combination of R&D leadership, customer facing responsibilities, SOC design expertise and software programming in that order
- Experience in emulation/prototyping of large SoCs
- Expert knowledge in FPGA design methodologies including high speed design and debug, serial protocols and FPGA timing closure is also required.
- Must have excellent hardware and system debug capabilities.
- RTL design knowledge using Verilog/SystemVerilog is required along with experience using RTL verification tools and flows.
- HW/SW co-design and co-verification is a plus
- Strong verbal and written communication skills in English
- Self-motivated and strong teamwork skills
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To view the job application please visit cadence.wd1.myworkdayjobs.com.