Senior R&D Engineer

Job Description and Requirements

Manage development of SRAM compiler IP, including schematic, layout oversight, design margins, and design checking.

Responsible for

• Memory architecture feasibility and specification estimation.
• Oversee product for automotive requirements.
• Optimize the design to meet the market requirements.
• Develop the Hyperx netlister on the designs to create the spice netlist to perform the characterization of the design. Perform the Verilog / espcv checks on the design to check the logic functionality.
• Design QA checks to check the quality of the design.
• Database QA to check the quality of the data being delivered to the customer.
• Database QA to check the quality of the data being delivered to the customer.
• Compiler integration and follow the QMS (quality management system) before the compiler got released to the customer.
• Work with testchip team to debug silicon issues and provide support to the silicon findings from a design perspective, and design the database on silicon to check overall functionality and performance.
• Perform ASIC integration checks to ensure that design will be used at the System on Chip (SoC) level.
• Work with customer to support silicon finding to ensure that custom products meets specifications.