R&D Engineer, Staff

Job Description and Requirements

We are seeking a highly motivated engineer to join the Synopsys Central Engineering DevOps team who will be responsible for tool development and handling the day to day operations of the comprehensive software infrastructure for the FPGA prototyping and synthesis products. Primary responsibility includes troubleshooting, diagnosing and fixing production software issues, developing reporting, analytical and visualization solutions, performing software maintenance and configuration, tracking and resolving technical challenges, build and develop tools which will automate daily operational activities.

The ideal candidate must be detailed oriented, have superior verbal and written communication skills, and strong organizational skills. You must be able to identify problems and implement solutions that detect and prevent outages. You must be able to accurately prioritize projects, make sound judgments, and work to improve the customer experience.

Requirements:

• B.S. in Computer Science or a related field with 6+ years of hands-on experience OR M.S in Computer Science or a related field  with 5+ years of hands-on experience
• Excellent verbal and written communication skills in English is required.
• Strong working knowledge with Perl, Python, bash, tcl is required to maintain and automate various development tasks
• Experience in Linux operating system is required
• Familiarity with automation tools such as Jenkins, Ansible
• Good knowledge of CI (Continuous Integration) methodologies used in agile software development
• Strong familiarity with SCM – Perforce, SVN, GIT, including branching and merging strategies
• Proven ability to troubleshoot and identify the root cause of issues.
• Collaborate with multi-site (across different time zones) product development, engineering teams
• Demonstrates skill and passion for operational excellence.

Desired:

• Experience with Windows operating system and Visual Studio
• Familiarity with C/C++ languages and compilation.
• Familiarity of UI/MVC frameworks and databases
• Familiarity with Design Automation software such as logic synthesis, simulation, and formal verification.
• Familiarity with SystemVerilog and/or VHDL languages.