Principal Silicon Validation Engineer

Summary of Duties:     

Responsible for test program development, fixture design, test debug, characterization, and validation on silicon.  Develop, optimize, and sustain test content used in technology qualification, reference design, IP characterization, and validation. As Design for Test (DFT) owner will perform required test coverage, tester capacity and test time goals. Drive internal test areas to improve data quality, cost, cycle time, and manufacturing robustness. Perform functional testing, digital CMOS and analog circuit analysis, test structure design, characterization, and debug. Compile memory with MBIST test and DMA test. Perform reliability test development for High Voltage Stress test, Voltage Droop test and Retention test. Test program and device failure analysis. Test program tuning for electrical fault isolation (EFI), including laser voltage prober, and EFA data correlation. Test program tuning for reliability including HTOL, ESD and Latch-up. Develop data analysis methodologies to determine root cause of circuit design, yield limitation, parametric performance, defect and functional signals. Provide Silicon Validation reporting across PVT corners, as needed. Test data analysis, including corner lots, voltage and temperature characterization with JMP. Project management, planning for first silicon bring-up, test hardware vendor and offshore test resource coordinates, test program release and revision control, test operation procedure, hardware setup and program documentation.

Requires a Master’s Degree in Electrical Engineering, Electronic Engineering, Computer Engineering, or related technical field of study plus 2 years of experience in the job offered or 2 years of experience as a Hardware Engineer, Test Development Engineer or similar role in a related technical field. In the alternative, a Bachelor’s Degree in Electrical Engineering, Electronic Engineering, Computer Engineering, or related technical field of study is acceptable, and four (4) years of experience in the job offered, or as a Hardware Engineer, Test Development Engineer or similar role in a related technical field.

Requires experience with circuit design, electrical test, and the implications of electrical characteristics and performance on yield and product behavior; semiconductor processing and process integration, test chips and test structures for yield limiter determination, improvement, and reliability; functional test engineering including tester configuration and calibration control, test program development, pattern generation and ATPG, MBIST, DMA and at-speed transition pattern translation; Advantest 93000 test system; C/C++ programming; Perl scripting; Memory (including single-port, two-port, and dual-port SRAMs including characterization for write collision), and Logic (including Scan and ATPG) IP; SQL scripting; JMP data analysis tools; design for test for Logic, Memory, and Analog test; and project management.