Principal Hardware Design Engineer & uArchitect of Processors & Accelerators

YOUR ROLE:

• Be a leading member of our design team providing a leading role in a significant part of the CPU microarchitecture
• Be responsible for the microarchitecture definition and implementation of RISC-V processors and components and leading a small team to deliver
• Processor development in our architecture language (CodAL)
• Working closely with the verification team on verification planning, debugging, and final sign-off
• Synthesis (timing and area optimizations) to ensure PPA targets can be met
• Participate in and drive design and verification review

YOU SHOULD HAVE:

• Over 5-10 years of recent and relevant experience with at least one HDL (VHDL/Verilog/SystemVerilog)
• Advanced knowledge of CPU architecture
• Ability to write clear and concise code
• Experience with digital circuit simulation
• User knowledge of Linux
• Knowledge of versioning tools (Git, SVN)
• Knowledge of scripting languages (Shell, Bash, Python)
• Analytical thinking, self-sufficiency, team collaboration
• Ability to work across teams to debug issues and find root causes

NICE-TO-HAVE:

• Knowledge of RISC-V instruction set
• Advanced knowledge of computer systems and architecture
• Experience with Synthesis, Design for Test and Timing Analysis
• Knowledge of C/C++
• Experience with Formal Verification concepts

WHAT WE CAN OFFER YOU:

• Opportunity to work with RISC-V, computer architecture of the future
• Working on innovative IoT processors and unique processor optimization technology
• Participation in the whole development process from analysis to deployment
• Opportunity to collaborate with experienced developers located in Germany, France, UK, Greece and the Czech Republic
• Receptivity to your own innovations and ideas
• Freedom and trust from Codasip management
• Flexible working hours, including working from home
• Very competitive compensation package
• Language courses (Chinese, Czech)