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DoD EDA Lead Application Engineer

DoD EDA Lead Application Engineer
by Admin on 06-02-2020 at 9:16 pm

Website Cadence

Application Engineer position supporting digital implementation flows using Cadence’s INNOVUS platform. Product scope includes (and is not limited to) Cadence’s Netlist-to-GDS digital implementation platform and signoff tools: INNOVUS (PnR), TEMPUS (STA), VOLTUS (IR Drop), QUANTUS (cell-level Parasitic Extraction). Will specify and create customized solutions (methodologies and flows) built around INNOVUS.

Expertise in tcl coding is required to customize digital implementation flows. Ability to instruct customers on how to produce optimal quantitative and qualitative results. Must have working knowledge of timing libraries, design constraints, STA. Must have expertise in timing closure and experience in helping customers/designers in closing difficult timing challenges. Must have expertise in industry cell-level place-and-route products, STA, Power analysis, and extraction products. Identification, filing, tracking and resolution of product-related defects. Strong communication / project management skills with both customers and internal sales teams; required to initiate, track and conclude customer product engagements quickly, efficiently and successfully.  Capable of multiplexing several customer benchmarks or engagements for a variety of small, mid and large customers. Ability to create customized algorithms and solutions on-the-fly to augment current capabilities in INNOVUS platform and drive enhancements into RnD. Expertise with advanced node flows and methodologies focusing on latest technologies for Low Power, Design-for-Yield (DFY) and Design-For-Manufacturing (DFY). Drive customer specifications and needs into the product. Must demonstrate fluidity in driving strategic and technical solution across multiple customer organizational levels including engineering, CAD, manager, director and VP levels; working cross-functionally with sales account team, R/D and marketing. Practical design experience with multiple chip tape-outs.

*Must be able to pass US Department of Defense security clearance.

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