Development Tools Software Engineer

We’re part of Silicon Debug Architecture and Embedded Solutions organization within Intel Validation team, and we’re looking for motivated, passionate, talented engineers to join our Debug Enabling team. We’re a strong, vibrant cross-site team.

As Senior Software Engineer, your job responsibilities would include technical readiness (TR), tool enabling strategy, tool development, Pre-Silicon validation (using emulation), tool checkout in Post-Silicon, enabling internal customers, debug and fix issues. Strategy phase includes identifying overall tool requirements (Platform, BIOS, Si FV/EV/PnP domains, Debug etc.) needed to deliver high quality debug tools. Additionally, you would interface with Debug Architecture, Design, Pre-silicon and Post-Silicon validation teams to improve debug tool quality and usability and as well as provide feedback for design teams.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to get results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world one product at a time. If you have this type of passion, please read on to learn about the Job Qualifications for this role. We welcome your application.

As Senior Software Engineer, your job responsibilities would include:

• Drives end-to-end debug enabling strategy for a given tool at Silicon and System level.
• Engages and works closely with IP engineering, SOC engineering and Software Engineering teams of Xeon products from pre-silicon (HFPGA, Emulation) to Post Silicon.
• Consults with DFX architecture teams about new and delta DFD feature impact on debug tools and works with them to define solutions.
• Drives detailed technical readiness for debug enabling solutions for a Xeon platform, identifies gaps/risks and leads various partners teams for resolving them.
• Defines collateral requirements, Spec formats and validation checkers for the debug tool and influences Xeon design teams towards implementation.
• Maps user and stakeholders debug strategy to define debug tool requirements and develop detailed debug enabling feature list for a platform.
• Drives continuous improvement across development, validation and customer support.
• Engages as necessary on critical debug or cross divisional TFs from pre-silicon to launch to provide debug enabling solutions.
• Collaborates with business units on Debug, Validation, Quality, TTM initiatives and workgroups.
• Shares responsibility to develop and strengthen technical leaders across the organization.

Minimum Qualifications:

The candidate must have a Bachelor’s Degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience in:

-OR-

Master’s Degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience in:

• Technical leadership of CPU and/or chipset validation.
• Experience working closely with Design teams, Pre-Silicon validation (Emulation and FPGA), Software architects.
• Python scripting, Object oriented programming (C++ and/or Java).
• Computer Architecture.

Preferred Qualifications:

• Working experience in Pre-Si environments like Emulation is preferred.
• Prior experience in leading cross divisional task forces and workgroups preferred.
• Solid leadership skills and working with a diverse team.
• High complex projects.