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Design Engineer– ME

Design Engineer– ME
by Admin on 07-13-2020 at 12:35 pm

  • Full Time
  • Nanjing

Website Cadence

  • Complete design implementation flows and related QA signoff for Serdes IP: Synthesis, CTS, STA, DFT/ATPG, , LEC/CLP,  etc.
  • Support design automation to improve Serdes IP quality and efficiency
  • EDA flows, environment, and related QA define, develop, maintain, and enhancement.
  • Power, speed and area (PPA) optimization.
  • Advanced process technology design implementation flows evaluation.
  • Support backend team to complete chip implementation signoff and tape out.
  • Support chip back performances measurement and correlation.
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