cs1149003013 synopsys a800x100 px

Design Engineer (2)

Design Engineer (2)
by Admin on 09-25-2023 at 1:44 pm

Website Verisilicon


  • Digital Signal Processor and subsystem microarchitecture and design.
  • Write technical design documents.
  • Participate in design, architecture and verification reviews.
  • Conduct RTL design and synthesis to analyze & optimize area, speed and power of physical implementation.
  • Perform coding in Verilog and SytemVerilog for RTL implementation.
  • Define, maintain and enhance Block level verification environments for design modules.
  • Develop and support reusable design and verification infrastructure using scripting tools like python/perl.
  • Perform automation of daily tasks using scripting tools like python/perl.
  • Document Daily Work flow with ASIC and FPGA design and verification flows.
  • Develop and validate test cases to verify accuracy and efficiency of modeling tools.


  • M.S. in Computer Engineering, Electrical Engineering or related field
  • Knowledge or experience in Verilog, SytemVerilog, design compiler, scripting tools (python/perl), verification tools and flows.
  • Knowledge or experience in processor architectures and cache memory systems.
  • Knowledge or experience in ASIC/SOC/FPGA design and verification flows.
  • Knowledge or experience in physical design implementation flow with Synopsys tools.
  • Programming skills in C/C++/System C/Assembly.
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To view the job application please visit www.verisilicon.com.

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