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ASIC Design Engineer (IP)

ASIC Design Engineer (IP)
by Admin on 08-21-2023 at 1:47 pm

  • Full Time
  • Chengdu, China
  • Applications have closed


  • Independently work on the design of ASIC functional blocks in terms of requirement analysis, architecture definition, block design, RTL coding, logic synthesis, and timing analysis (STA).
  • Contribute and work on in Graphics Processor(GPU), Video Processo(r VPU), Display Processor(DPU), DSP Processor(ZSP), Image Signal Processor(ISP) and Neural Network Processor(NPU)Project.


  • Master’s or above degree in EE/CS related majors, working experience is unlimited.
  • Familiar with ASIC design process, including specification, micro-architecture, and RTL implementation.
  • Programming skills in Verilog HDL or VHDL.
  • Knowledge of processor, computer architecture, computer graphics, low power design, AI, ISP and video processing is preferred.
  • Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
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